92HD005 Datasheet, PDF (44/205 Pages) Integrated Device Technology – 4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE

92HD005/92HD005D
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
PC AUDIO
Table 47. AFG GPIODir Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Direction control for GPIO3
[3]
Control3
RW
0x0
0 = GPIO signal is configured as input
1 = GPIO signal is configured as output
Direction control for GPIO2
[2]
Control2
RW
0x0
0 = GPIO signal is configured as input
1 = GPIO signal is configured as output
Direction control for GPIO1
[1]
Control1
RW
0x0
0 = GPIO signal is configured as input
1 = GPIO signal is configured as output
Direction control for GPIO0
[0]
Control0
RW
0x0
0 = GPIO signal is configured as input
1 = GPIO signal is configured as output
3.4.2.15. AFG GPIOWake
Table 48. AFG GPIOWake Command Verb Format
Verb ID
Payload
Get
F18
00
Set1
718
See bits [7:0] of bitfield table.
Response
See bitfield table.
0000_0000h
Bit
[31:5]
[4]
[3]
Table 49. AFG GPIOWake Command Response Format
Bitfield Name
RW
Reset
Description
Rsvd
R
0x0
Reserved
Wake enable for GPIO4:
0 = wake-up event is disabled;
En4
RW
0x0
1 = when HD Audio link is powered down
(RST# is asserted), a wake-up event will
trigger a Status Change Request event on
the link.
Wake enable for GPIO3:
0 = wake-up event is disabled;
En3
RW
0x0
1 = when HD Audio link is powered down
(RST# is asserted), a wake-up event will
trigger a Status Change Request event on
the link.
IDT™
44
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
92HD005/92HD005D
V 1.0 12/06