92HD005 Datasheet, PDF (43/205 Pages) Integrated Device Technology – 4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE

92HD005/92HD005D
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
PC AUDIO
Bit
[31:5]
[4]
[3]
[2]
[1]
[0]
Table 45. AFG GPIOEn Command Response Format
Bitfield Name
RW
Reset
Description
Rsvd
R
0x0
Reserved
Mask4
Enable for GPIO4:
RW
0x0
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Mask3
Enable for GPIO3:
RW
0x0
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Mask2
Enable for GPIO2:
RW
0x0
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Mask1
Enable for GPIO1:
RW
0x0
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Mask0
Enable for GPIO0:
RW
0x0
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
3.4.2.14. AFG GPIODir
Table 46. AFG GPIODir Command Verb Format
Verb ID
Payload
Get
F17
00
Set1
717
See bits [7:0] of bitfield table.
Response
See bitfield table.
0000_0000h
Bit
[31:5]
[4]
Table 47. AFG GPIODir Command Response Format
Bitfield Name
RW
Reset
Description
Rsvd
R
0x0
Reserved
Control4
Direction control for GPIO4
RW
0x0
0 = GPIO signal is configured as input
1 = GPIO signal is configured as output
IDT™
43
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
92HD005/92HD005D
V 1.0 12/06