92HD005 Datasheet, PDF (15/205 Pages) Integrated Device Technology – 4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE

92HD005/92HD005D
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
PC AUDIO
Table 1. 92HD005/92HD005D Valid Digital Microphone Configurations
Digital
Mics
0
1
Data Sample
N/A
Single Edge (see Figure 3)
Double Edge on either DMIC_0 or
2
1 (see Figure 4)
OR
Single Edge on DMIC_0 and 1
Double Edge on one DMIC pin
3
and Single Edge on the second
DMIC pin.
4
Double Edge (see Figure 5)
ADC
Conn.
N/A
0 or 1
0 or 1
0 or 1
0 or 1
Notes
No Digital Microphones
Available on either DMIC_0 or DMIC_1
Both ADC Channels process data, may be in-phase or out-of-phase by 1/2
DMIC_CLK period depending upon external configuration and timing
Available on either DMIC_0 or DMIC_1
External logic required to support sampling on a single Digital Microphone pin
channel on rising edge and second Digital Microphone right channel on falling
edge of DMIC_CLK for those digital microphones that don’t support alternative
clock edge capability. If both DMIC_0 and DMIC_1 are used to support 2 digital
microphones, 2 separate ADC units will be used, however, this configuration is
not recommended since it consumes two stereo ADC resources.
Requires both DMIC_0 or DMIC_1
External logic required to support sampling on a single Digital Microphone pin
channel on rising edge and second Digital Microphone right channel on falling
edge of DMIC_CLK for those digital microphones that don’t support alternative
clock edge capability. Two ADC units are required to support this configuration
Connected to DMIC_0 and DMIC_1
External logic required to support sampling on a single Digital Microphone pin
channel on rising edge and second Digital Microphone right channel on falling
edge of DMIC_CLK for those digital microphones that don’t support alternative
clock edge capability. Two ADC units are required to support this configuration
Power
State
D0
D1
D2
D3
D0-D3
Table 2. DMIC_CLK, DMIC_0 and DMIC_1 Operation During Power States
DMIC
Widget
Enabled?
Yes
Yes
Yes
Yes
No
DMIC_CLK
Output
Clock Capable
Clock Disabled
Clock Disabled
Clock Disabled
Clock Disabled
DMIC_0,1
Input
Capable
Input
Disabled
Input
Disabled
Input
Disabled
Input
Disabled
Notes
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1 input widget
is enabled. Otherwise, the DMIC_CLK remains low.
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1 input widget
is enabled. Otherwise, the DMIC_CLK remains low.
DMIC_CLK remains low
DMIC_CLK remains low
DMIC_CLK is HIGH-Z with weak pull-down
IDT™
15
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
92HD005/92HD005D
V 1.0 12/06