ICS9DB401C Datasheet, PDF (4/17 Pages) Integrated Device Technology – Four Output Differential Buffer for PCI Express

ICS9DB401C
Four Output Differential Buffer for PCI Express
Pin Description for OE_INV = 1
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PIN NAME
VDD
SRC_IN
SRC_IN#
GND
VDD
DIF_1
DIF_1#
PIN TYPE
PWR
IN
IN
PWR
PWR
OUT
OUT
OE1#
IN
DIF_2
DIF_2#
VDD
OUT
OUT
PWR
BYPASS#/PLL IN
SCLK
IN
SDATA
I/O
DESCRIPTION
Power supply, nominal 3.3V
0.7 V Differential SRC TRUE input
0.7 V Differential SRC COMPLEMENTARY input
Ground pin.
Power supply, nominal 3.3V
0.7V differential true clock output
0.7V differential complement clock output
Active low input for enabling DIF pair 1.
1 = tri-state outputs, 0 = enable outputs
0.7V differential true clock output
0.7V differential complement clock output
Power supply, nominal 3.3V
Input to select Bypass(fan-out) or PLL (ZDB) mode
0 = Bypass mode, 1= PLL mode
Clock pin of SMBus circuitry, 5V tolerant.
Data pin for SMBus circuitry, 5V tolerant.
15 PD
IN
Asynchronous active high input pin used to power down the
device. The internal clocks are disabled and the VCO is stopped.
16 SRC_STOP
17 HIGH_BW#
18 VDD
19 DIF_5#
20 DIF_5
21 OE6#
22 DIF_6#
23 DIF_6
24 VDD
25 OE_INV
26 IREF
27 GNDA
28 VDDA
IN
IN
PWR
OUT
OUT
IN
OUT
OUT
PWR
IN
OUT
PWR
PWR
Active high input to stop SRC outputs.
3.3V input for selecting PLL Band Width
0 = High, 1= Low
Power supply, nominal 3.3V
0.7V differential complement clock output
0.7V differential true clock output
Active low input for enabling DIF pair 6.
1 = tri-state outputs, 0 = enable outputs
0.7V differential complement clock output
0.7V differential true clock output
Power supply, nominal 3.3V
This latched input selects the polarity of the OE pins.
0 = OE pins active high, 1 = OE pins active low (OE#)
This pin establishes the reference current for the differential
current-mode output pairs. This pin requires a fixed precision
resistor tied to ground in order to establish the appropriate
current. 475 ohms is the standard value.
Ground pin for the PLL core.
3.3V power for the PLL core.
IDT^TM/ICS^TM Four Output Differential Buffer for PCI Express
4
ICS9DB401C REV E 03/18/08