ICS950910 Datasheet, PDF (4/21 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for P4

Integrated
Circuit
Systems, Inc.
ICS950910
General Description
The ICS950910 is a single chip clock solution for desktop designs using the VIA P4X/P4M/KT/KN266/333 style chipsets with
PC133 or DDR memory.
The ICS950910 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing Control Hub). This part
incorporates ICS's newest clock technology which offers more robust features and functionality. Employing the use of a
serially programmable I²C interface, this device can adjust the output clocks by configuring the frequency setting, the output
divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each
individual output clock. M/N control can configure output frequency with resolution up to 0.1MHz increment.
Block Diagram
FBOUT
Power Groups
Pin Number
VDD
GND
55
2
5
9
16
13
22
19
23
24
34, 40
33, 39
50
47
51
54
0735B—09/21/07
Description
Xtal, Ref
AGP [0:2], CPU digital, CPU PLL
PCI [0:5], PCI_F outputs
48MHz, Fix Digital, Fix Analog
Master clock, CPU Analog
DDR/SDR outputs
2.5V CPUT/C_CS output
3.3V CPUT/C & CPUOD_T/C
4