ICS93716 Datasheet, PDF (4/13 Pages) Integrated Circuit Systems – Low Cost DDR Phase Lock Loop Clock Driver

ICS9371 6
Absolute Maximum Ratings
Supply Voltage (VDD & AVDD) . . . . . . . . . . . -0.5V to 4.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.5V to V_DD + 0.5V
Ambient Operating Temperature . . . . . . . . . . 0°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T_A = 0 - 85C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V, R_L = 120Ω, C_L=15pF (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
Input High Current
I_IH V_I = V_DD or GND
5
µA
Input Low Current
I_IL V_I = V_DD or GND
5
µA
Operating Supply
I_DD2.5 RL = 120Ω, CL = 0pf @ 170MHz
250
350
mA
Current
I_DDPD C_L = 0pf
65
90
mA
Input Clamp Voltage
V_IK V_DDQ = 2.3V Iin = -18mA
-1.2
V
High-level output
voltage
V_OH
I_OH = -1 mA
I_OH = -12 mA
V_DD - 0.1
1.7
V
V
Low-level output voltage
V_OL
I_OL=1 mA
I_OL=12 mA
0.1
V
0.6
V
Input Capacitance¹
C_IN V_I = GND or V_DD
3
pF
Output Capacitance¹
C_OUT V_OUT = GND or V_DD
3
pF
1_{Guaranteed by design at 233MHz, not 100% tested in production.}
0420H—09/10/08
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