ICS93716 Datasheet, PDF(3/13 Page) Integrated Circuit Systems – Low Cost DDR Phase Lock Loop Clock Driver

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ICS93716 Datasheet, PDF (3/13 Pages) Integrated Circuit Systems – Low Cost DDR Phase Lock Loop Clock Driver

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ICS9371 6

Byte 0: Output Control

(1= enable, 0 = disable)

BIT

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PIN#

2, 1

4, 5

13, 14

26, 27

24, 25

PWD

DESCRIPTION

1 CLKT0, CLKC0

1 CLKT1, CLKC1

1 Reserved

1 CLKT2, CLKC2

1 CLKT5, CLKC5

1 Reserved

1 CLKT4, CLKC4

Byte 2: Reserved

(1= enable, 0 = disable)

BIT PIN# PWD

DESCRIPTION

Bit 7 -

X Reserved

Bit 6 -

X Reserved

Bit 5 -

X Reserved

Bit 4 -

X Reserved

Bit 3 -

X Reserved

Bit 2 -

X Reserved

Bit 1 -

X Reserved

Bit 0 -

X Reserved

Byte 1: Output Control

(1= enable, 0 = disable)

BIT

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PIN#

17, 16

PWD

DESCRIPTION

X Reserved

1 CLKT3, CLKC3

X Reserved

Byte 3: Reserved

(1= enable, 0 = disable)

BIT PIN# PWD

DESCRIPTION

Bit 7 -

X Reserved

Bit 6 -

X Reserved

Bit 5 -

X Reserved

Bit 4 -

X Reserved

Bit 3 -

X Reserved

Bit 2 -

X Reserved

Bit 1 -

X Reserved

Bit 0 -

X Reserved

Byte 4: Reserved

(1= enable, 0 = disable)

BIT PIN# PWD

DESCRIPTION

Bit 7 -

X Reserved

Bit 6 -

X Reserved

Bit 5 -

X Reserved

Bit 4 -

X Reserved

Bit 3 -

X Reserved

Bit 2 -

X Reserved

Bit 1 -

X Reserved

Bit 0 -

X Reserved

Byte 5: Reserved

(1= enable, 0 = disable)

BIT PIN# PWD

DESCRIPTION

Bit7 -

0 Reserved (Note)

Bit6 -

0 Reserved (Note)

Bit5 -

0 Reserved (Note)

Bit4 -

0 Reserved (Note)

Bit3 -

0 Reserved (Note)

Bit2 -

1 Reserved (Note)

Bit1 -

1 Reserved (Note)

Bit0 -

0 Reserved (Note)

Note: Donât write into this register, writing into this

0420Hâ09/10/08

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