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ICS854S057BI Datasheet, PDF (4/15 Pages) Integrated Device Technology – One LVDS output pair
ICS854S057BI Data Sheet
4:1, OR 2:1 LVDS CLOCK MULTIPLEXER W/INTERNAL INPUT TERMINATION
Table 4D. LVDS DC Characteristics, VDD = 2.5V ± 5%, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
VOD
∆VOD
VOS
∆VOS
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
VOS Magnitude Change
Minimum
225
1.125
Typical
325
4
1.25
5
Maximum
425
35
1.375
25
Units
mV
mV
V
mV
Table 5. AC Characteristics, VDD = 2.5V ± 5%, TA = -40°C to 85°C
Symbol
Parameter
Test Conditions
fMAX
tPD
tsk(pp)
Output Frequency
Propagation Delay; NOTE 1
Part-to-Part Skew; NOTE 2, 3
tsk(i)
Input Skew
tjit
Buffer Additive Phase Jitter, RMS; 622.08MHz, Integration Range:
refer to Additive Phase Jitter Section
12kHz – 20MHz
tR / tF
Output Rise/Fall Time
20% to 80%
≤ 700MHz
odc
Output Duty Cycle
ƒ ≤ 1.1GHz
ƒ ≤ 2GHz
MUXISOLATION MUX Isolation
ƒ = 500MHz
Minimum
300
50
49
47
43
Typical
>2
0.065
-65
Maximum
800
200
40
250
51
53
57
Units
GHz
ps
ps
ps
ps
ps
%
%
%
dBm
NOTE: All parameters measured at ƒ ≤ 1.9GHz unless noted otherwise.
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between different devices operating at the same supply voltage, same frequency and with equal load conditions.
Using the same type of inputs on each device, the output is measured at the differential cross point.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
ICS854S057BGI REVISION A MARCH 29, 2010
4
©2010 Integrated Device Technology, Inc.