ICS853S54I Datasheet, PDF (4/21 Pages) Integrated Device Technology – Maximum output frequency

ICS853S54I Data Sheet
DUAL 2:1, 1:2 DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
Table 4D. LVPECL DC Characteristics, V_CC = 2.375V to 3.465V, V_EE = 0V, T_A = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
Typical
I_IH
I_IL
V_PP
V_CMR
Input
High Current
PCLKA[0:1], PCLKB
nPCLKA[0:1], nPCLKB
Input
Low Current
PCLKA[0:1], PCLKB
nPCLKA[0:1], nPCLKB
Peak-to-Peak Input Voltage; NOTE 1
Common Mode Input Voltage;
NOTE 1, 2
V_CC = V_IN
V_CC = V_IN
V_CC = 3.465V, V_IN = 0V
V_CC = 3.465V, V_IN = 0V
-200
-200
0.15
1.2
V_OH
V_OL
V_SWING
Output High Current; NOTE 3
Output Low Current; NOTE 3
Peak-to-Peak Output Voltage Swing
V_CC – 1.125
V_CC – 1.895
0.6
V_CC – 1.005
V_CC – 1.78
NOTE 1: V_IL should not be less than -0.3V.
NOTE 2: Common mode input voltage is defined as V_IH.
NOTE 3: Outputs terminated with 50 to V_CC – 2V.
Maximum
200
200
1.2
V_CC
V_CC – 0.875
V_CC – 1.62
1.0
Units
µA
µA
µA
µA
V
V
V
V
V
AC Electrical Characteristics
Table 5. AC Characteristics, V_CC = 2.375V to 3.465V, V_EE = 0V or V_CC = 0V, V_EE = -3.465V to -2.375V, T_A = -40°C to 85°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum Units
f_OUT
t_PD
Output Frequency
Propagation Delay;
NOTE 1
QA, nQA
QBx, nQBx
2.5
GHz
225
335
445
ps
195
305
420
ps
tsk(pp)
Part-to-Part Skew; NOTE 2, 3
200
ps
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter
Section; NOTE 4
622.08MHz Integration
Range: 12kHz - 20MHz
0.035
ps
MUX__ISOLATION MUX Isolation; NOTE 5
t_R / t_F
Output Rise/Fall Time
ƒ_OUT = 622.08MHz,
V_PP = 800mV
20% to 80%
75
65
dB
155
250
ps
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All parameters are measured  1GHz unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: Measured using clock input at 622.08MHz.
NOTE 5: Q/nQ output measured differentially. See Parameter Measurement Information for MUX Isolation diagram.
ICS853S54AKI REVISION A OCTOBER 30, 2012
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©2012 Integrated Device Technology, Inc.