ICS2305 Datasheet, PDF (4/9 Pages) Integrated Circuit Systems – 3.3 VOLT ZERO DELAY, LOW SKEW BUFFER

ICS2305
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
ZERO DELAY BUFFER
DC Electrical Characteristics
ICS2305M-XX, VDD = 3.3 V ±10%, Ambient Temperature -40 to +85° C(Industrial), (0-70° C Commercial)
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Operating Voltage
VDD
3.0
3.6
V
Input High Voltage
Input Low Voltage
Input Low Current
Input High Current
Output High Voltage
Output Low Voltage
Operating Supply Current
V_IH
V_IL
I_IL
VIN = 0V
I_IH VIN = VDD
V_OH I_OH = -12 mA
V_OL I_OL = 12 mA
IDD No Load
2
V
0.8
V
50
µA
100 µA
2.4
V
0.4
V
32 mA
Power Down Supply
Current
CLKIN = 0, Note 1
12
µA
Short Circuit Current
I_OS Each output
±50
mA
Input Capacitance
C_IN CLKIN
5
pF
Note 1: When there is no clock signal present at CLKIN, the ICS2305 will enter power down mode. The
PLL is stopped and the outputs are tri-state.
AC Electrical Characteristics
ICS2305M-1, VDD=3.3 V ±10%, Ambient temperature -40 to +85° C(Industrial), (0-70° C Commercial)
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Output Clock Frequency
Output Clock Frequency
f_IN
10 pF load
30 pF load
10
133 MHz
10
100 MHz
Output Rise Time
t_OR 0.8 to 2.0 V, outputs loaded
2.5 ns
Output Fall Time
t_OF 2.0 to 0.8 V, outputs loaded
2.5 ns
Output Clock Duty Cycle
t_DC
measured at 1.4V, Fout=66.67
40
50 60
%
MHz
Output Clock Duty Cycle
Device to Device Skew
t_DC measured at 1.4V, Fout=50 MHz 45
rising edges at VDD/2
50 55
%
700 ps
Output to Output Skew
rising edges at VDD/2
250 ps
Input to Output Skew
rising edges at VDD/2
±350 ps
Cycle to Cycle Jitter
measured at 66.67M, outputs
loaded
200 ps
PLL Lock Time
Note 2
1.0 ms
Note 2: With VDD at a steady rate and valid input at CLKIN.
IDT™ / ICS™ 3.3 VOLT ZERO DELAY LOW SKEW BUFFER
4
ICS2305
REV E 081709