IDT82P2284 Datasheet, PDF (352/384 Pages) Integrated Device Technology – Quad T1/E1/J1 Long Haul / Short Haul Transceiver

IDT82P2284
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
RPLC:
The indirect registers of RPLC addressed from 00H to 1FH are the Timeslot Control Registers for TS0 to TS31. Each address corresponds to one
timeslot.
The indirect registers of RPLC addressed from 20H to 3FH are the Data Trunk Conditioning Code Registers for TS0 to TS31. Each address cor-
responds to one timeslot.
The indirect registers of RPLC addressed from 41H to 4FH and from 51H to 5FH are the Signaling Trunk Conditioning Code Registers for TS1 to
TS15 and TS17 to TS31 respectively. Each address corresponds to one timeslot.
E1 Timeslot Control Register (00H ~ 1FH)
Bit No.
7
6
5
4
3
2
1
0
Bit Name
SUBST2
SUBST1
SUBST0
SINV
OINV
EINV
G56K
GAP
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
SUBST[2:0]:
When the GSUBST[2:0] bits (b2~0, E1-0D0H,...) are ‘000’, these bits select the replacement on a per-timeslot basis.
SUBST[2:0]
000
001
010
011
the others
Replacement Selection
No operation.
The data of the corresponding timeslot is replaced by the data trunk code set in the DTRK[7:0] bits (b7~0, E1-ID-20~3FH).
The data of the corresponding timeslot is replaced by the A-Law digital milliwatt pattern.
The data of the corresponding timeslot is replaced by the µ-Law digital milliwatt pattern.
Reserved.
SINV, OINV, EINV:
These three bits select how to invert the bits in the corresponding timeslot.
SINV OINV EINV
Bit Inversion
0
0
0 No inversion.
0
0
1 Invert the even bits (bit 2, 4, 6, 8) of the corresponding timeslot (bit 1 is the MSB).
0
1
0 Invert the odd bits (bit 3, 5, 7) except the MSB of the corresponding timeslot (bit 1 is the MSB).
0
1
1 Invert the bits from bit 2 to bit 8 of the corresponding timeslot (bit 1 is the MSB).
1
0
0 Invert the MSB (bit 1) of the corresponding timeslot.
1
0
1 Invert the MSB (bit 1) and the even bits (bit 2, 4, 6, 8) of the corresponding timeslot.
1
1
0 Invert all the odd bits (bit 1, 3, 5, 7) of the corresponding timeslot (bit 1 is the MSB).
1
1
1 Invert all the bits (bit 1 ~ bit 8) of the corresponding timeslot (bit 1 is the MSB).
Programming Information
341
March 22, 2004