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STAC9202 Datasheet, PDF (32/135 Pages) Integrated Device Technology – 2-CHANNEL HIGH DEFINITION AUDIO CODEC WITH
STAC9202
2-CHANNEL HIGH DEFINITION AUDIO CODEC WITH DUAL DIGITAL MICROPHONE INTERFACES
PC AUDIO
Table 35. AFG GPIOEn Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Enable for GPIO1:
[1]
Mask1
RW
0x0
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO0:
[0]
Mask0
RW
0x0
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
5.4.14. AFG GPIODir
Get
Set1
Table 36. AFG GPIODir Command Verb Format
Verb ID
Payload
F17
00
717
See bits [7:0] of bitfield table
Response
See bitfield table
0000_0000h
Bit
[31:4]
[3]
[2]
[1]
[0]
Table 37. AFG GPIODir Command Response Format
Bitfield Name
RW
Reset
Description
Rsvd
R
0x0
Reserved
Control3
Direction control for GPIO3
RW
0x0
0 = GPIO signal is configured as input
1 = GPIO signal is configured as output
Control2
Direction control for GPIO2
RW
0x0
0 = GPIO signal is configured as input
1 = GPIO signal is configured as output
Control1
Direction control for GPIO1
RW
0x0
0 = GPIO signal is configured as input
1 = GPIO signal is configured as output
Control0
Direction control for GPIO0
RW
0x0
0 = GPIO signal is configured as input
1 = GPIO signal is configured as output
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC WITH DUAL DIGITAL MICROPHONE INTERFACES 32
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STAC9202
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