STAC9202 Datasheet, PDF (31/135 Pages) Integrated Device Technology – 2-CHANNEL HIGH DEFINITION AUDIO CODEC WITH

STAC9202
2-CHANNEL HIGH DEFINITION AUDIO CODEC WITH DUAL DIGITAL MICROPHONE INTERFACES
PC AUDIO
Table 33. AFG GPIO Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Data for GPIO1 (Pin 34). If this GPIO bit is
configured as Sticky (edge-sensitive) input,
[1]
Data1
RW
0x0
it can be cleared by writing zero (one) here
when the corresponding Polarity Control bit
is zero (one).
Data for GPIO0 (Pin 33). If this GPIO bit is
configured as Sticky (edge-sensitive) input,
[0]
Data0
RW
0x0
it can be cleared by writing zero (one) here
when the corresponding Polarity Control bit
is zero (one).
5.4.13. AFG GPIOEn
Get
Set1
Table 34. AFG GPIOEn Command Verb Format
Verb ID
Payload
F16
00
716
See bits [7:0] of bitfield table
Response
See bitfield table
0000_0000h
Bit
[31:4]
[3]
[2]
Table 35. AFG GPIOEn Command Response Format
Bitfield Name
RW
Reset
Description
Rsvd
R
0x0
Reserved
Mask3
Enable for GPIO3:
RW
0x0
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Mask2
Enable for GPIO2:
RW
0x0
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC WITH DUAL DIGITAL MICROPHONE INTERFACES 31
IDT CONFIDENTIAL
STAC9202
V 1.1 102606