ICS849N202I Datasheet, PDF (31/39 Pages) Integrated Device Technology – FemtoClock® NG Universal Frequency Translator

ICS849N202I Data Sheet
FemtoClock® NG Universal Frequency Translator
3.3V
FB1
muRata, BLM18BB221SN1
C14
C13
0.1uF
10uF
VDDO
C15
0.1uF
VDD
C4 C5 C6 C7
Output Termination Example - LVDS
output shown (Note 3)
3.3V
FB2
muRata, BLM18BB221SN1
C9
C8
0.1uF
10uF
VDD
C10
0.1uF
0.1uF 0.1uF 0.1uF 0.1uF
R2 10
C11
C12
10uF 0.1uF
Zo = Zo_Dif f = 100-ohm
R1
+
100
C1 16MHz to 40 MHz
12pF
5pF
C2
5pF
CLK0
Input Termination
Example - LVDS input
R5
shown (Note 3)
100
nCLK0
VDD
R9 R10
125 125
Input Termination ^CLK1
Example - LVPECL
nCLK1
input shown (Note 3)
R14 R15
U1
X1
1
2 ^XTAL_IN
(Note 1)
XTAL_OUT
(Note 2)CLK_SEL
4
5 ^CLK_SEL
6 ^CLK0
9 ^CLK0
10 ^CLK1
UFT
(Note 1)
CLK1
(Note 2)PLL_BYPASS
(Note 1)S_A0
(Note 1)S_A1
SCLK
12
18
17
15
PLL_BY PASS
S_A0
S_A1
SDATA
14 ^SCLK
(Note 1)CONFIG
(Note 2)
16 ^SDATA
CONFIG
R11
R12
4.7K
4.7K
VDD
Logic Input Pin Examples
27
Q0 ₂₆
Q0 ₂₈
OE0
24
Q1 ₂₃
Q1 ₂₂
OE1
30
LOCK_IND ₃₁
CLK_ACTIVE ₃₇
HOLDOVER ₃₈
CLK0BAD ₃₉
CLK1BAD ₄₀
XTALBAD
34
LF1
33
LF0
OE0(Note 1)
OE1(Note 1)
LOCK_IND
CLK_ACTIVE
HOLDOVER
CLKBAD
CLK1BAD
XTALBAD
3-pole loop filter
C3
R3
0.001uF
220K
Rs
Cp
0.001uF
Notes
470K
Cs
1uF
-
Zo = 50-ohm
Zo = 50-ohm
VDDO
R17 R4
125 125
+
-
R6 R7
84 84
Output Termination Example - LVPECL
output shown (Note 3)
2-pole loop filter - (optional)
LF1
84 84
VDD _{Set Logic}
Input to '1'
VDD _{Set Logic}
Input to '0'
Note 1: CE0, OE1, CLK_SEL, PLL_BYPASS, S_A0 and S_A1 are digital control inputs. If
external pull-up/down needed, see "Logic Input Pin Examples" shown at left. Please note
that OE0 and OE1 are internally pulled up so no external pull-ups are required to enable
them.
LF0
Rs
Cp
0.001uF
470K
Cs
1uF
RU1
1K
To Logic
Input pins
RD1
Not Installed
RU2
Not Installed
To Logic
Input pins
RD2
1K
Note 2: CLK_SEL, PLL_BYPASS and CONFIG are internally pulled down. No external
compononents required to select default condition.
Note 3: Other configurations are supported. Please contact IDT for details.
Figure 11. ICS849N202I Application Schematic
ICS849N202CKI REVISION A SEPTEMBER 26, 2011
31
©2011 Integrated Device Technology, Inc.