MC88LV926 Datasheet, PDF (3/11 Pages) Motorola, Inc – LOW SKEW CMOS PLL 68060 CLOCK DRIVER

MC88LV926
Low Skew CMOS PLL 68060 Clock Driver
NETCOM
Table 2. Maximum Ratings⁽¹⁾
Symbol
Parameter
Limits
Unit
V_CC, AV_CC
V_in
V_out
I_in
I_out
I_CC
T_stg
DC Supply Voltage Referenced to GND
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, Per Pin
DC Output Sink/Source Current, Per Pin
DC V_CC or GND Current Per Output Pin
Storage Temperature
–0.5 to 7.0
V
–0.5 to V_CC +0.5
V
–0.5 to V_CC +0.5
V
±20
mA
±50
mA
±50
mA
–65 to +150
°C
1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
Table 3. Recommended Operating Conditions
Symbol
V_CC
V_in
V_out
T_A
ESD
Supply Voltage
Parameter
DC Input Voltage
DC Output Voltage
Ambient Operating Temperature
Static Discharge Voltage
Limits
3.3 ±0.3
0 to V_CC
0 to V_CC
0 to 70
> 1500
Unit
V
V
V
°C
V
Table 4. DC Characteristics (T_A = 0°C to 70°C; V_CC = 3.3 V ± 0.3 V)⁽¹⁾
Symbol
Parameter
V_CC
Guaranteed Limits
V_IH
Minimum High Level Input Voltage⁽¹⁾
3.0
2.0
3.3
2.0
V_IL
Minimum Low Level Input Voltage
3.0
0.8
3.3
0.8
V_OH
Minimum High Level Output Voltage
3.0
2.2
3.3
2.5
V_OL
Minimum Low Level Output Voltage
3.0
0.55
3.3
0.55
I_IN
Maximum Input Leakage Current
3.3
I_CCT
Maximum I_CC/Input
3.3
I_OLD
Minimum Dynamic⁽⁴⁾ Output Current
3.3
I_OHD
3.3
I_CC
Maximum Quiescent Supply Current
3.3
±1.0
2.0 ⁽³⁾
50
–50
750
Unit
V
V
V
V
μA
mA
mA
mA
μA
Condition
V_OUT = 0.1V or
V_CC – 0.1V
V_OUT = 0.1V or
V_CC – 0.1V
V_IN = V_IH or
V_IL = –24mA
I_OH = –24mA
V_IN = V_IH or
V_IL = +24mA⁽²⁾
I_OH = +24mA
V_I = V_CC, GND
V_I = V_CC – 2.1V
V_OLD = 1.25V Max
V_OHD = 2.35 Min
V_I = V_CC, GND
1. The MC88LV926 can also be operated from a 3.3V supply. V_OH output levels will vary 1:1 with V_CC, input levels and current specs will be
unchanged, except V_IH; when V_CC > 4.0 volts, V_IH minimum level is 2.7 volts.
2. I_OL is +12mA for the RST_OUT output.
3. Maximum test duration 2.0ms, one output loaded at a time.
4. The PLL_EN input pin is not guaranteed to meet this specification.
IDT™ Low Skew CMOS PLL 68060 Clock Driver
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MC88LV_M92_C6_88LV926
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