89HPES64H16G2 Datasheet, PDF (27/57 Pages) Integrated Device Technology – Low latency cut-through architecture

IDT 89HPES64H16G2 Data Sheet
I/O Type Parameter
Description
Min¹
Gen1
Typ¹ Max¹
Min¹
Gen2
Typ¹ Max¹
Serial Link PCIe Receive
(cont.) _VRX-DIFFp-p
Differential input voltage (peak-to- 175
1200 120
1200
peak)
RL_RX-DIFF
Receiver Differential Return Loss 10
10
8
RL_RX-CM
Receiver Common Mode Return 6
6
Loss
Z_RX-DIFF-DC
Differential input impedance (DC) 80
100
120
Z_RX--DC
DC common mode impedance
40
50
60
Z_RX-COMM-DC
Powered down input common
mode impedance (DC)
200k 350k
Refer to return loss spec
40
60
50k
Z_{RX-HIGH-IMP-DC-} DC input CM input impedance for
50k
50k
POS
V>0 during reset or power down
Z_{RX-HIGH-IMP-DC-} DC input CM input impedance for
1.0k
1.0k
NEG
V<0 during reset or power down
V_RX-IDLE-DET- Electrical idle detect threshold
65
175
65
175
DIFFp-p
V_RX-CM-ACp
Receiver AC common-mode peak
150
150
voltage
PCIe REFCLK
Other I/Os
C_IN
Input Capacitance
1.5
—
1.5
—
LOW Drive
I_OL
Output
I_OH
High Drive
I_OL
Output
I_OH
Schmitt Trig-
V_IL
ger Input
(STI)
V_IH
—
2.5
—
—
2.5
—
—
-5.5
—
—
-5.5
—
—
12.0
—
—
12.0
—
—
-20.0
—
—
-20.0
—
-0.3
—
0.8
-0.3
—
0.8
2.0
— V_DDI/O + 2.0
— V_DDI/O +
0.5
0.5
Input
V_IL
V_IH
-0.3
—
0.8
-0.3
—
0.8
2.0
— V_DDI/O + 2.0
— V_DDI/O +
0.5
0.5
Capacitance
Leakage
C_IN
Inputs
—
—
8.5
—
—
8.5
—
—
+ 10
—
—
+ 10
I/O_{LEAK W/O}
Pull-ups/downs
—
—
+ 10
—
—
+ 10
I/O_{LEAK WITH}
Pull-ups/downs
—
—
+ 80
—
—
+ 80
Table 19 DC Electrical Characteristics (Part 2 of 2)
1. _{Minimum, Typical, and Maximum values meet the requirements under PCI Specification 2.0.}
Unit
Condi-
tions
mV
dB 0.05 - 1.25GHz
1.25 - 2.5GHz
dB
Ω
Ω
Ω
Ω
Ω
mV
mV V_RX-CM-ACp
pF
mA
V_OL = 0.4v
mA
V_OH = 1.5V
mA
V_OL = 0.4v
mA
V_OH = 1.5V
V
—
V
—
V
—
V
—
pF
—
μA V_DDI/O (max)
μA V_DDI/O (max)
μA V_DDI/O (max)
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November 28, 2011