89HPES64H16G2 Datasheet, PDF (12/57 Pages) Integrated Device Technology – Low latency cut-through architecture

IDT 89HPES64H16G2 Data Sheet
Signal
CLKMODE[1:0]
GCLKFSEL
MSMBSMODE
P01MERGEN
P23MERGEN
P45MERGEN
P67MERGEN
P89MERGEN
P1011MERGEN
P1213MERGEN
P1415MERGEN
Type
Name/Description
Clock Mode. These signals determine the port clocking mode used by
ports of the device.
I Global Clock Frequency Select. These signals select the frequency of
the GCLKP and GCLKN signals.
0x0 100 MHz
0x1 125 MHz
I Master SMBus Slow Mode. The assertion of this pin indicates that the
master SMBus should operate at 100 KHz instead of 400 KHz. This value
may not be overridden.
I Port 0 and 1 Merge. P01MERGEN is an active low signal. It is pulled low
internally. When this pin is low, port 0 is merged with port 1 to form a single
x8 port. The Serdes lanes associated with port 1 become lanes 4 through 7
of port 0. When this pin is high, port 0 and port 1 are not merged, and each
operates as a single x4 port.
I Port 2 and 3 Merge. P23MERGEN is an active low signal. It is pulled low
internally. When this pin is low, port 2 is merged with port 3 to form a single
x8 port. The Serdes lanes associated with port 3 become lanes 4 through 7
of port 2. When this pin is high, port 2 and port 3 are not merged, and each
operates as a single x4 port.
I Port 4 and 5 Merge. P45MERGEN is an active low signal. It is pulled low
internally. When this pin is low, port 4 is merged with port 5 to form a single
x8 port. The Serdes lanes associated with port 5 become lanes 4 through 7
of port 4. When this pin is high, port 4 and port 5 are not merged, and each
operates as a single x4 port.
I Port 6 and 7 Merge. P67MERGEN is an active low signal. It is pulled low
internally. When this pin is low, port 6 is merged with port 7 to form a single
x8 port. The Serdes lanes associated with port 7 become lanes 4 through 7
of port 6. When this pin is high, port 6 and port 7 are not merged, and each
operates as a single x4 port.
I Port 8 and 9 Merge. P89MERGEN is an active low signal. It is pulled low
internally. When this pin is low, port 8 is merged with port 9 to form a single
x8 port. The Serdes lanes associated with port 9 become lanes 4 through 7
of port 8. When this pin is high, port 8 and port 9 are not merged, and each
operates as a single x4 port.
I Port 10 and 11 Merge. P1011MERGEN is an active low signal. It is pulled
low internally. When this pin is low, port 10 is merged with port 11 to form a
single x8 port. The Serdes lanes associated with port 11 become lanes 4
through 7 of port 10. When this pin is high, port 10 and port 11 are not
merged, and each operates as a single x4 port.
I Port 12 and 13 Merge. P1213MERGEN is an active low signal. It is pulled
low internally. When this pin is low, port 12 is merged with port 13 to form a
single x8 port. The Serdes lanes associated with port 13 become lanes 4
through 7 of port 12. When this pin is high, port 12 and port 13 are not
merged, and each operates as a single x4 port.
I Port 14 and 15 Merge. P1415MERGEN is an active low signal. It is pulled
low internally. When this pin is low, port 14 is merged with port 15 to form a
single x8 port. The Serdes lanes associated with port 15 become lanes 4
through 7 of port 14. When this pin is high, port 14 and port 15 are not
merged, and each operates as a single x4 port.
Table 6 System Pins (Part 1 of 2)
12 of 57
November 28, 2011