IDT82V2048S Datasheet, PDF (22/62 Pages) Integrated Device Technology – OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT WITH SINGLE ENDED OPTION

IDT82V2048S OCTAL T1/E1 SHORT HAUL LIU WITH SINGLE ENDED OPTION
INDUSTRIAL TEMPERATURE RANGES
2.17.4 DUAL LOOPBACK
Dual Loopback mode is set by setting bit DLBn in register DLB and
bit RLBn in register RLB to ‘1’. In this configuration, after passing the
encoder, the data and clock to be transmitted are looped back to
decoder directly and output on RCLKn, RDn/RDPn and CVn/RDNn. The
recovered data from RTIPn and RRINGn are looped back to waveform
shaper through JA (if selected) and output on TTIPn and TRINGn. The
LOS Detector is still in use. Figure-17 shows the process.
2.17.5 TRANSMIT ALL ONES (TAOS)
In hardware mode, the TAOS mode is set by pulling pin TCLKn high
for more than 16 MCLK cycles. In host mode, TAOS mode is set by
programming register TAO. In addition, automatic TAOS signals are
inserted by setting register ATAO when Loss of Signal occurs. Note that
the TAOS generator adopts MCLK as a timing reference. In order to
assure that the output frequency is within specified limits, MCLK must
have the applicable stability.
The TAOS mode, the TAOS mode with Digital Loopback and the
TAOS mode with Analog Loopback are shown in Figure-18, Figure-19
and Figure-20.
RTIPn
RRINGn
TTIPn
TRINGn
Peak
Detector
Slicer
LOS
Detector
One of Eight Identical Channels
CLK&Data
Recovery
(DPLL)
Jitter
Attenuator
B8ZS/
HDB3/AMI
Decoder
Digital
Loopback
Line
Driver
Waveform
Shaper
Jitter
Attenuator
B8ZS/
HDB3/AMI
Encoder
Transmit
All Ones
Figure-14 Digital Loopback
LOSn
RCLKn
RDn/RDPn
CVn/RDNn
TCLKn
TDn/TDPn
BPVIn/TDNn
RTIPn
RRINGn
TTIPn
TRINGn
Analog
Loopback
Slicer
LOS
Detector
One of Eight Identical Channels
CLK&Data
Recovery
(DPLL)
Jitter
Attenuator
B8ZS/
HDB3/AMI
Decoder
Peak
Detector
Line
Driver
Waveform
Shaper
Jitter
Attenuator
B8ZS/
HDB3/AMI
Encoder
Transmit
All Ones
Figure-15 Analog Loopback
LOSn
RCLKn
RDn/RDPn
CVn/RDNn
TCLKn
TDn/TDPn
BPVIn/TDNn
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