8T73S1802_17 Datasheet, PDF (20/25 Pages) Integrated Device Technology – 1:2 Clock Fanout Buffer and Frequency Divider

8T73S1802 Datasheet
Power Considerations
This section provides information on power dissipation and junction temperature for the 8T73S1802. 
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 8T73S1802 is the sum of the core power plus the power dissipated due to the load. 

Output Load:
LVPECL output load is 50 to (V_{CCO_QA} – 2V)
LVCMOS output load is 10pF

Frequency:
LVPECL is 800MHz
LVCMOS is 200MHz

The following is the power dissipation for V_CC = 3.3V + 5% = 3.465V, which gives worst case results.
The maximum current at 85°C is as follows:
I_{EE_MAX} = 109mA
• Power__MAX = V_{CCx_MAX} * I_{EE_MAX} = 3.465V * 109mA = 377.685mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device.
The maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures
that the bond wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj = _JA * Pd_total + T_A
Tj = Junction Temperature
_JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T_A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance _JA must be used. Assuming no air flow
and a multi-layer board, the appropriate value is 74.7°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.378W * 74.7°C/W = 113.2°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the
type of board (multi-layer).
Table 6. Thermal Resistance _JA for 16-Lead VFQFN, Forced Convection
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
_JA vs. Air Flow
0
74.7°C/W
1
65.3°C/W
2.5
58.5°C/W
©2017 Integrated Device Technology, Inc.
20
February 7, 2017