ICS9LRS4103 Datasheet, PDF (2/15 Pages) Integrated Device Technology – 32-pin CK505 for Intel Systems

ICS9LRS4103
PC MAIN CLOCK
Pin Description
Pin#
1
2
3
4
5
Pin Name
X1
X2
SMBCLK_3.3
SMBDAT_3.3
VDD96
6 DOT96T
7 DOT96C
8 GND96
9 GNDSSC
10 CK_SSC_DISP_T
11 CK_SSC_DISP_C
12 VDDSSC
13 VDDSATA
14 SRC1T/SATA_NS_T
15 SRC1C/SATA_NS_C
16 GNDSATA
17 GNDSRC
18 SRC2T
19 SRC2C
20 VDDSRC
Type Pin Description
IN Crystal input, Nominally 14.318MHz.
OUT Crystal output, Nominally 14.318MHzMHz.
IN
I/O
PWR
OUT
OUT
PWR
PWR
OUT
OUT
PWR
PWR
OUT
OUT
PWR
PWR
OUT
OUT
PWR
Clock pin of SMBus circuitry, 3.3V tolerant.
Data pin for SMBus circuitry, 3.3V tolerant.
Power pin for the DOT96MHz output 3.3V.
True clock DOT96 output with integrated 33ohm series resistor. No 50ohm
resistor to GND needed.
Complementary clock DOT96 output with integrated 33ohm series resistor.
No 50ohm resistor to GND needed.
Ground pin for the DOT96MHz output.
Ground pin for the CK_SSC_DISP output.
True clock of CK_SSC_DISP (100MHz or 120MHz) output with integrated
33ohm series resistor. No 50ohm resistor to GND needed.
Complementary clock of CK_SSC_DISP (100MHz or 120MHz) output with
integrated 33ohm series resistor. No 50ohm resistor to GND needed.
Power pin for the CK_SSC_DISP output 3.3V
Power pin for the SATA output 3.3V
True clock of differential 0.8V push-pull SRC/SATA output with integrated
33ohm series resistor. No 50ohm resistor to GND needed.
Complementary clock of differential 0.8V push-pull SRC/SATA output with
integrated 33ohm series resistor. No 50ohm resistor to GND needed.
Ground pin for the SATA output.
Ground pin for the SRC output.
True clock of differential 0.8V push-pull SRC output with integrated 33ohm
series resistor. No 50ohm resistor to GND needed.
Complementary clock of differential 0.8V push-pull SRC output with
integrated 33ohm series resistor. No 50ohm resistor to GND needed.
Power pin for the SRC output 3.3V.
21 SEL_120M#
IN Selects pins #10/11 to be 120MHz or 100MHz. "0" = 120MHz, "1" = 100MHz.
22 GNDCPU
PWR Ground pin for the CPU output.
23 CPUT0
OUT
True clock of differential pair 0.8V push-pull CPU outputs with integrated
33ohm series resistor. No 50 ohm resistor to GND needed.
24 CPUC0
OUT
Complementary clock of differential pair 0.8V push-pull CPU outputs with
integrated 33ohm series resistor. No 50 ohm resistor to GND needed.
25 VDDCPU
PWR Power pin for the CPU output 3.3V
26 CKPWRGD/PD#_3.3
IN
Notifies CK505 to sample latched inputs, or iAMT entry/exit, or PWRDWN#
mode
27 VDDREF14M
PWR Power pin for the REF output 3.3V
Reference 14.318 MHz clock, which drives 3 loads on default / 3.3V tolerant
28 REF14.318M_3X/FSLC** I/O input for CPU frequency selection. Refer to input electrical characteristics for
Vil_FS and Vih_FS values.
29 GNDREF
PWR Ground pin for the REF output.
30 VDDXTAL
PWR Power pin for XTAL 3.3V
31 SEL_SATA_NS#
IN Selects pin #14/15 to be SRC1 or SATA_NS. "0" = SATA_NS, "1" = SRC1
32 GNDXTAL
PWR Ground pin for XTAL.
IDT^® PC MAIN CLOCK
2
1520A—03/16/10