ICS83908I-02 Datasheet, PDF (2/16 Pages) Integrated Device Technology – LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS FANOUT BUFFER

ICS83908I-02
LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS FANOUT BUFFER
PRELIMINARY
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
V_DD
Power
2, 3
XTAL_IN0,
XTAL_OUT0
Input
Core supply pin.
Crystal oscillator interface. XTAL_IN0 is the input.
XTAL_OUT0 is the output.
4, 10, 15, 21
5, 6, 8,
9, 16, 17,
19, 20
V_DDO
Q0, Q1, Q2,
Q3, Q4, Q5,
Q6, Q7
Power
Output
Output supply pins.
Single-ended clock outputs. LVCMOS/LVTTL interface levels.
7, 18, 24
GND
Power
Power supply ground.
11,
14
CLK_SEL0,
CLK_SEL1
Input
Pulldown
Clock select inputs. See Table 3, Input Reference Function Table.
LVCMOS / LVTTL interface levels.
12
CLK0
Input Pulldown Single-ended clock input. LVCMOS/LVTTL interface levels.
13
22, 23
OE
XTAL_OUT1,
XTAL_IN1
Input
Input
Pullup
Output enable. When LOW, outputs are in HIGH impedance state.
When HIGH, outputs are active. LVCMOS / LVTTL interface levels.
Crystal oscillator interface. XTAL_IN1 is the input.
XTAL_OUT1 is the output.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R_PULLUP
R_PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
C_PD
Power Dissipation Capacitance
(per output)
R_OUT
Output Impedance
Test Conditions
V_DDO = 3.465V
V_DDO = 2.625V
V = 2V
DDO
V_DDO = 3.3V ± 5%
V_DDO = 2.5V ± 5%
V_DDO = 1.8V ± 0.2V
Minimum
Typical
4
51
51
7
7
6
19
21
32
Maximum
Units
pF
kΩ
kΩ
pF
pF
pF
Ω
Ω
Ω
TABLE 3. INPUT REFERENCE FUNCTION TABLE
Control Inputs
CLK_SEL1 CLK_SEL0
0
0
0
1
1
0
1
1
Reference
XTAL0 (default)
XTAL1
CLK0
CLK0
IDT^™ / ICS^™ LVCMOS FANOUT BUFFER
2
ICS83908AGI-02 REV. B JULY 24, 2007