ICS830S21I Datasheet, PDF (2/11 Pages) Integrated Device Technology – 1-TO-1 2.5V, 3.3V DIFFERENTIAL-TOLVCMOS/LVTTL TRANSLATOR

ICS830S21I
1-TO-1, 2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR
Table 1. Pin Descriptions
Number
Name
Type
Description
1, 6
nc
Unused
No connect.
2
CLK
Input
Pullup/
Pulldown
Non-inverting differential clock input.
3
nCLK
Input
Pullup/
Pulldown
Inverting differential clock input.
4
V_BB
Output
5
GND
Power
Output reference voltage.
Power supply ground.
7
Q
Output
Single-ended clock output. LVCMOS / LVTTL interface levels.
8
V_DD
Power
Positive supply pin.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
C_IN
Input Capacitance
R_PULLUP
Input Pullup Resistor
R_PULLDOWN Input Pulldown Resistor
C_PD
Power Dissipation Capacitance
R_OUT
Output Impedance
Test Conditions
V_DD = 3.465V
V_DD = 2.625V
V_DD = 3.3V
V_DD = 2.5V
Minimum
Typical
4
51
51
10
8
10
12
Maximum
Units
pF
kΩ
kΩ
pF
pF
Ω
Ω
IDT™ / ICS™ LVCMOS/LVTTL TRANSLATOR
2
ICS830S21AMI REV. A MARCH 21, 2008