ICS83023I Datasheet, PDF (2/13 Pages) Integrated Device Technology – DUAL, 1-TO-1 DIFFERENTIAL-TOLVCMOS TRANSLATOR/BUFFER

ICS83023I _ICS83023I
Integrated
Circuit
D , 1- -1 _{DUAL, 1-TO-1 DIFSFyEsRtEemNTsI,AILn-cT.O-LVCMOS TRANSLATOR/BUFFER}
D - -LVCMOS T /B IFFERENTIAL TO
UAL TO _TSD
RANSLATOR UFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
CLK0
Input Pulldown Non-inverting differential clock input.
2
nCLK0
Input
Pullup Inverting differential clock input.
3
nCLK1
Input
Pullup Inverting differential clock input.
4
CLK1
Input Pulldown Non-inverting differential clock input.
5
GND
Power
Power supply ground.
6
Q1
Output
Single clock output. LVCMOS / LVTTL interface levels.
7
Q0
Output
Single clock output. LVCMOS / LVTTL interface levels.
8
V_DD
Power
Positive supply pin.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
C_PD
R_PULLUP
R_PULLDOWN
R_OUT
Parameter
Input Capacitance
Power Dissipation Capacitance
(per output)
Input Pullup Resistor
Input Pulldown Resistor
Output Impedance
Test Conditions
V_DD = 3.6V
Minimum
Typical
4
23
51
51
7
Maximum Units
pF
pF
kΩ
kΩ
Ω
83023AMI
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2
IDT™ / ICS™ DUAL, 1-TO-1 DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER
2
REV. B JANUARY 18, 2006
ICS83023I