ICS810001-21 Datasheet, PDF (2/19 Pages) Integrated Circuit Systems – FEMTOCLOCKS-TM DUAL VCXO VIDEO PLL

ICS810001-21 Data Sheet
Block Diagram
FEMTOCLOCK™ DUAL VCXO VIDEO PLL
Loop
Filter
CLK0 ^Pulldown
0
CLK1 ^Pulldown
1
CLK_SEL ^Pulldown
V3:V0 ^{Pulldown 4}
VCXO Input
Pre-Divider
(P Value
from Table)
VCXO
Divider
Table
Phase
Detector
0
1
Charge
Pump
VCXO
VCXO Feedback Divider
(M Value from Table)
VCXO Jitter Attenuation PLL
MR ^Pulldown
MF ^Pulldown
N1:N0 ^{Pulldown 2}
nBP1:nBP0 ^Pullup
2
Master Reset
FemtoClock
10
Frequency Multiplier
11
0= x22 (default)
1= x24
00
01 _Output
Divider
01
10
10
11
00 = 4 (default)
11
01 = 8
10 = 12
11 = 18
Q
Pullup _OE
Pin Assignment
32 31 30 29 28 27 26 25
LF1 1
24 N0
LF0 2
23 N1
ISET 3
22 nBP1
V_DD 4
nBP0 5
21 OE
20 GND
GND 6
19 Q
CLK_SEL 7
18 VDDO
CLK1 8
17 VDDA
9 10 11 12 13 14 15 16
ICS810001-21
32 Lead VFQFN
5mm x 5mm x 0.925mm
package body
K Package
Top View
ICS810001DK-21 REVISION B APRIL 13, 2010
2
©2010 Integrated Device Technology, Inc.