9SQL4954 Datasheet, PDF (2/20 Pages) Integrated Device Technology – 4-output CK420BQ Derivative

9SQL4954 DATASHEET
Pin Configuration
GNDXTAL 1
XIN/CLKIN_25 2
X2 3
VDDXTAL3.3 4
VDDREF3.3 5
vSADR/REF3.3 6
GNDREF 7
GNDDIG ₈
32 31 30 29 28 27 26 25
9SQL4954
connect
epad to GND
9 10 11 12 13 14 15 16
24 vOE2#
23 BCLK2#
22 BCLK2
21 VDDA3.3
20 GNDA
19 BCLK1#
18 BCLK1
17 vOE1#
SMBus Address Selection Table
32-pin VFQFPN, 5x5 mm, 0.5mm pitch
^ prefix indicates internal 120KOhm pull up resistor
v prefix indicates internal 120KOhm pull down resistor
State of SADR on first application
of CKPWRGD_PD#
SADR
0
1
Address
1101000
1101010
+ Read/Write Bit
x
x
Power Management Table
CKPWRGD_PD#
SMBus OEx#
BCLKx
OE bit
Pin True O/P Comp. O/P
REF
0
X
X
Low¹
Low¹
Hi-Z²
1
1
0
Running
Running Running
1
1
1
Disabled¹
Disabled¹ Running
1
0
X
Disabled¹
Disabled¹ Disabled⁴
1. The output state is set by B11[1:0] (Low/Low default)
2. REF is Hi-Z until the 1st assertion of CKPWRGD_PD# high. After this, when
CKPWRG_PD# is low, REF is disabled unless Byte3[5]=1, in which case REF is
running..
3. Input polarities defined at default SMBus values.
4. See SMBus description for Byte 3, bit 4
Power Connections
Pin Number
VDD
4
5
9
16, 25
21
GND
1
7
8, 30
15, 26, 33
20
Description
XTAL Analog
REF Output
Digital Power
BCLK outputs
PLL Analog
4-OUTPUT CK420BQ DERIVATIVE
2
DECEMBER 12, 2016