8V44N4614 Datasheet, PDF (2/31 Pages) Integrated Device Technology – Clock generator for wireless base-band systems

8V44N4614 DATA SHEET
Block Diagram
Pulldown
CLK
nCLK
0
Pullup/
Pulldown
÷P
LCLK ^Pulldown 1
REFSEL ^Pulldown
BYPASS ^Pulldown
TEST ^Pulldown
NA
1
÷16
÷20
FemtoClock NG PLL
÷25
2500 MHz
0
÷100
0
÷M
1
÷M_T
NB
÷16
÷20
÷25
÷100
MISO
MOSI ^Pullup
SPICLK
Pullup
Pullup
nCS
OENA ^Pullup
OENB ^Pulldown
Power-up
Reset
SPI Slave
Controller
Register File ⁶
13
NC
÷16
÷20
÷25
÷100
LOCK
QA0, nQA0
QA1, nQA1
QA2, nQA2
QA3
QA4
QB0
QB1
QB2
QB3
QC0
QC1
QC2
QC3
FEMTOCLOCK^® NG JITTER ATTENUATOR AND CLOCK SYNTHESIZER
2
REVISION 1 02/25/15