83918 Datasheet, PDF (2/19 Pages) Integrated Device Technology – Maximum output frequency

83918 DATA SHEET
Table 1. Pin Descriptions
Number
1, 2, 12, 17, 25
3
4
5,
6
7
8, 16, 21, 29
9, 10, 11,
13, 14, 15,
18, 19, 20, 22,
23, 24, 26, 27,
28, 30, 31, 32
Name
GND
LVCMOS_CLK
CLK_SEL
XTAL_IN,
XTAL_OUT
V_DD
V_DDO
Q17, Q16, Q15,
Q14, Q13, Q12,
Q11, Q10, Q9, Q8,
Q7, Q6, Q5, Q4,
Q3, Q2,Q1, Q0
Type
Power
Input Pulldown
Input Pulldown
Input
Power
Power
Description
Power supply ground.
Single-ended clock input. LVCMOS/LVTTL interface levels.
Clock select pin. When HIGH, selects LVCMOS_CLK. When LOW,
selects crystal inputs. LVCMOS/LVTTL interface levels.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the
output.
Positive supply pin.
Output supply pins.
Output
Single-ended clock outputs. LVCMOS/LVTTL interface levels.
NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
C_IN
Parameter
Input Capacitance
C_PD
Power Dissipation Capacitance
(per output)
R_PULLDOWN Input Pulldown Resistor
R_OUT
Output Impedance
Test Conditions
V_DDO = 3.465V
V_DDO = 2.625V
V_DDO = 2V
V_DDO = 3.465V
V_DDO = 2.625V
V_DDO = 2V
Minimum
18
20
25
Typical
4
9
8
8
51
19
22
29
Maximum
20
24
34
Units
pF
pF
pF
pF
k



Rev B 3/25/15
2
LOW SKEW, 1:18 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER