ICS813252I-02 Datasheet, PDF (19/22 Pages) Integrated Device Technology – VCXO JITTER ATTENUATOR & FEMTOCLOCK™ MULTIPLIER

ICS813252I-02
VCXO JITTER ATTENUATOR & FEMTOCLOCK™ MULTIPLIER
PACKAGE OUTLINE AND DIMENSIONS - K SUFFIX FOR 32 LEAD VFQFN
NOTE: The above mechanical package drawing is a generic drawing that applies to any pin count VFQFN package. This drawing is not
intended to convey the actual pin count or pin layout of this device. The pin count and pinout are shown on the front page. The package
dimensions are in Table 8 below.
TABLE 8. PACKAGE DIMENSIONS
JEDEC VARIATION
ALL DIMENSIONS IN MILLIMETERS (VHHD -2/ -4)
SYMBOL
Minimum
Maximum
N
32
A
0.80
1.0
A1
0
0.05
A3
0.25 Reference
b
0.18
0.30
e
0.50 BASIC
N_D
8
N_E
8
D, E
5.0 BASIC
D2, E2
3.0
3.3
L
0.30
0.50
Reference Document: JEDEC Publication 95, MO-220
IDT^™ / ICS^™ VCXO JITTER ATTENUATOR/MULTIPLIER
19
CS813252CKI-02 REV. A OCTOBER 22, 2008