ICS813252I-02 Datasheet, PDF (14/22 Pages) Integrated Device Technology – VCXO JITTER ATTENUATOR & FEMTOCLOCK™ MULTIPLIER

ICS813252I-02
VCXO JITTER ATTENUATOR & FEMTOCLOCK™ MULTIPLIER
SCHEMATIC EXAMPLE
Figure 6 shows an example of the ICS813252I-02 application
schematic. In this example, the device is operated at V =
CC
V = V = 3.3V. The decoupling capacitors should be
CCX
CCO
located as close as possible to the power pin. The input is
driven by a 3.3V LVPECL driver. An optional 3-pole filter
can also be used for additional spur reduction. It is
recommended that the loop filter components be laid out for
the 3-pole option. This will also allow the 2-pole filter to be
used.
FIGURE 6. ICS813252I-02 SCHEMATIC EXAMPLE
IDT^™ / ICS^™ VCXO JITTER ATTENUATOR/MULTIPLIER
14
CS813252CKI-02 REV. A OCTOBER 22, 2008