831752_16 Datasheet, PDF (14/18 Pages) Integrated Device Technology – Clock Switch for ATCA/AMC and PCIe Applications

831752 Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the 831752I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 831752I is the sum of the core power plus the analog power plus the power dissipated in the load(s). The
following is the power dissipation for V_DD = 3.3V + 5% = 3.465V, which gives worst case results.
• Power (core)_MAX = V_{DD_MAX} * I_{DD_MAX} = 3.465V * 64mA = 221.76mW
Power dissipation for the FCLK, nFCLK input internal 50ohm termination. Assume the FCLK, nFCLK input is driven by a HCSL driver. Logic
High input current ~ 17mA. Logic low current ~ 0mA.
• Power (input) = 50ohm * (17mA)² = 14.45mW
Total Power__MAX (3.465V, with all outputs switching) = 221.76mW + 14.45mW = 236.21mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj = _JA * Pd_total + T_A
Tj = Junction Temperature
_JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T_A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance _JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 81.2°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.236W * 81.2°C/W = 104.2°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance _JA for 16 Lead TSSOP, Forced Convection
_JA vs. Air Flow
Meters per Second
0
1
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
81.2°C/W
73.9°C/W
70.2°C/W
©2016 Integrated Device Technology, Inc
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Revision B June 28, 2016