ZSSC3027 Datasheet, PDF (12/46 Pages) Integrated Device Technology – Low-Power, High-Resolution 16-Bit Sensor Signal Conditioner

ZSSC3027 Datasheet
2.3. Analog Front End
2.3.1. Amplifier
The amplifier has a differential architecture and consists of two stages. The amplification of each stage and the
sensor bridge gain polarity are programmable via settings in the Measurement Configuration Register BM_config
(address 10_HEX; see section 3.6.3) in the MTP memory (see section 2.4.2). The first five bits of BM_config are the
programmable gain settings Gain_stage1 and Gain_stage2. The options for the programmable gain settings are
listed in Table 2.1 and Table 2.2.
Table 2.1 Amplifier Gain: Stage 1
Gain_stage1
BM_config Bit G1
0
0
1
1
BM_config Bit G0
0
1
0
1
Stage 1 Gain Setting
12
20
30
40
Table 2.2 Amplifier Gain: Stage 2
Gain_stage2
BM_config Bit G4
0
0
0
0
1
1
1
1
BM_config Bit G3
0
0
1
1
0
0
1
1
BM_config Bit G2
0
1
0
1
0
1
0
1
Stage 2 Gain Setting
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
If needed, the polarity of the sensor bridge gain can be reversed by setting the Gain_polarity bit, which is bit 5 in
the BM_config register (see section 3.6.3). Changing the gain polarity is achieved by inverting the chopper clock.
Table 2.3 gives the settings for the Gain_polarity bit. This feature enables applying a sensor to the ZSSC3027
with swapped input signals at INN and INP; e.g., to avoid crossing wires for the final sensor module’s assembly.
© 2016 Integrated Device Technology, Inc.
12
April 20, 2016