ZSSC3027 Datasheet, PDF (11/46 Pages) Integrated Device Technology – Low-Power, High-Resolution 16-Bit Sensor Signal Conditioner

ZSSC3027 Datasheet
Figure 2.1 ZSSC3027 Functional Block Diagram
VDDB
VTP _Temperature
Reference
VTN Sensor
AGND / CM
Generator
Vreg int
Bias Current
Generator
Voltage
Regulator
Power Ctr.
ZSSC3027
VDD
VSS
Sensor
Bridge
INP
INN
VSSB
Power-ON
Reset
Pre-
Amplifier
Clock
Generator _Ring
Oscillator
A
D
16 Bit
System
Control
Unit
18-bit DSP Core
(Calculations,
Communication)
EOC
MTP
ROM
SPI
I²C^TM
SCLK/SCL
SS
MOSI/SDA
MISO
SEL
The amplifier consists of two stages with programmable gain values. The 1/f noise and inherent offset are
suppressed by auto-zero and chopper stabilizer techniques. This auto-zero sequence is performed before each
bridge sensor and temperature measurement to compensate for the inherent offset of the amplifier.
The ZSSC3027 employs a 2-stage analog-to-digital converter (ADC) based on switched-capacitor technique with
inherit low-pass behavior and noise suppression. The programmable resolution from 10 to 16 bits provides
flexibility for adapting the conversion characteristics. To improve power supply noise suppression, the ADC uses
the bridge supply V_DDB as its reference voltage.
The remaining IC-internal offset and the sensor element offset, i.e., the overall system offset for the amplifier and
ADC, can be canceled by an offset and auto-zero measurement, respectively.
The DSP accomplishes the auto-zero, span, and 1^st and 2^nd order temperature compensation of the measured
bridge signal. The correction coefficients are stored in the MTP memory.
The ZSSC3027 supports SPI and I²C™ interface communication for controlling the ZSSC3027, configuration, and
measurement result output.
© 2016 Integrated Device Technology, Inc.
11
April 20, 2016