ICS9LPRS462 Datasheet, PDF (12/23 Pages) Integrated Device Technology – Low Power Clock for ATI RS/RD600 series chipsets for AMD CPUs

ICS9LPRS462
Low Power Clock for ATI RS/RD600 series chipsets for AMD CPUs
Table 4: CPU Divider Ratios
B19b(7:4)
Divider (3:2)
Bit
00
01
10
11
MSB
00
0000
2
0100
4
1000
8
1100
16
01
0001
3
0101
6
1001
12
1101
24
10
0010
5
0110
10
1010
20
1110
40
11
0011
15
0111
30
1011
60
1111
120
LSB Address Div Address
Address Div Address Div
Table 5: HTT Divider Ratios
B20b(3:0)
Divider (3:2)
Bit
00
01
10
11
MSB
00
0000
4
0100
8
1000
16
1100
32
01
0001
3
0101
6
1001
12
1101
24
10
0010
5
0110
10
1010
20
1110
40
11
0011
15
0111
30
1011
60
1111
120
LSB Address Div Address
Address Div Address Div
Table 6: ATIG Divider Ratios
B19b(3:0)
Divider (3:2)
Bit
00
01
10
11
MSB
00
0000
2
0100
4
1000
8
1100
16
01
0001
3
0101
6
1001
12
1101
24
10
0010
5
0110
10
1010
20
1110
40
11
0011
7
0111
14
1011
28
1111
56
LSB Address Div Address
Address Div Address Div
CPU Clock
Common Recommendations for Differential Routing
L1 length, Route as coupled 93 ohm trace.
L2 length, Route as coupled 93 ohm trace.
Dimension or Value
0.5 max
Contact AMD
Unit Figure
inch 1
inch 1
Figure 1 CPU clock routing.
3900pF
+/-10%
Low Power Output Buffer
w/integrated series resistor
3900pF
+/-10%
93Ω +/-10% DIFF
L2
L2
IDT^TM/ICS^TM Low Power Clock for ATI RS/RD600 series chipsets for AMD CPUs
12
93Ω +/-10% DIFF
L1
169Ω +/-10%
L1
AMD "Greyhound"
CPU input
1378A—04/07/08