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ICS8534-01 Datasheet, PDF (12/20 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER | |||
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ICS8534-01
LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
Recommendations for Unused Input and Output Pins
Inputs:
Outputs:
CLK/nCLK Inputs
For applications not requiring the use of the differential input, both
CLK and nCLK can be left floating. Though not required, but for
additional protection, a 1k⦠resistor can be tied from CLK to
ground.
LVPECL Outputs
All unused LVPECL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
PCLK/nPCLK Inputs
For applications not requiring the use of the differential input, both
PCLK and nPCLK can be left floating. Though not required, but for
additional protection, a 1k⦠resistor can be tied from PCLK to
ground.
LVCMOS Control Pins
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k⦠resistor can be used.
Termination for 3.3V LVPECL Outputs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50â¦
transmission lines. Matched impedance techniques should be
used to maximize operating frequency and minimize signal
distortion. Figures 5A and 5B show two different layouts which are
recommended only as guidelines. Other suitable clock layouts may
exist and it would be recommended that the board designers
simulate to guarantee compatibility across all printed circuit and
clock component process variations.
Zo = 50â¦
FOUT
FIN
Zo = 50â¦
50â¦
RTT =
1
((VOH + VOL) / (VCC â 2)) â 2
Zo
50â¦
VCC - 2V
RTT
Figure 5A. 3.3V LVPECL Output Termination
FOUT
3.3V
125â¦
125â¦
Zo = 50â¦
FIN
Zo = 50â¦
84â¦
84â¦
Figure 5B. 3.3V LVPECL Output Termination
IDT⢠/ ICS⢠3.3V LVPECL FANOUT BUFFER
12
ICS8534AY-01 REV. A DECEMBER 6, 2007
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