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ICS843N252-45 Datasheet, PDF (12/16 Pages) Integrated Device Technology – Fourth generation FemtoClock
ICS843N252-45 Data Sheet
FEMTOCLOCK® CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
3. Calculations and Equations.
The purpose of this section is to calculate the power dissipation for the LVPECL output pair.
LVPECL output driver circuit and termination are shown in Figure 4.
VCC
Q1
VOUT
RL
50Ω
VCC - 2V
Figure 4. LVPECL Driver Circuit and Termination
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination voltage of
VCC – 2V.
• For logic high, VOUT = VOH_MAX = VCC_MAX –0.75V
(VCC_MAX – VOH_MAX) = 0.75V
• For logic low, VOUT = VOL_MAX = VCC_MAX – 1.5V
(VCC_MAX – VOL_MAX) = 1.5V
•
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(VOH_MAX – (VCC_MAX – 2V))/RL] * (VCC_MAX – VOH_MAX) = [(2V – (VCC_MAX – VOH_MAX))/RL] * (VCC_MAX – VOH_MAX)
= [(2V – 0.75V)/50Ω] * 0.75V = 18.75mW
Pd_L = [(VOL_MAX – (VCC_MAX – 2V))/RL] * (VCC_MAX – VOL_MAX) = [(2V – (VCC_MAX – VOL_MAX))/RL] * (VCC_MAX – VOL_MAX)
= [(2V – 1.5V)/50Ω] * 1.5V = 15mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 33.75mW
ICS843N252GG-45 REVISION A JULY 6, 2011
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©2011 Integrated Device Technology, Inc.