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ICS843N252-45 Datasheet, PDF (10/16 Pages) Integrated Device Technology – Fourth generation FemtoClock
ICS843N252-45 Data Sheet
FEMTOCLOCK® CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS843N252-45.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843N252-45 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Core and LVPECL Output Power Dissipation
• Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 124mA = 429.66mW
• Power (LVPECL) = 33.75mW/Loaded Output pair
LVCMOS Output Power Dissipation
• Output Impedance ROUT Power Dissipation due to Loading 50Ω to VCCOA/2
Output Current IOUT = VCCOA_MAX / [2 * (50Ω + ROUT)] = 3.465V / [2 * (50Ω + 15Ω)] = 26.65mA
• Power Dissipation on the ROUT per LVCMOS output
Power (ROUT) = ROUT * (IOUT)2 = 15Ω * (26.65mA)2 = 10.65mW per output
• Dynamic Power Dissipation at 125MHz
Power (125MHz) = CPD * Frequency * (VCCOA)2 = 7pF * 125MHz * (3.465V)2 = 10.51mW
Total Power Dissipation
• Total Power
= Power (core) + Power (LVPECL) + Power (ROUT) + Power (125MHz)
= 429.66mW + 33.75mW + 10.65mW + 10.51mW
= 484.57mW
ICS843N252GG-45 REVISION A JULY 6, 2011
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©2011 Integrated Device Technology, Inc.