92HD66C Datasheet, PDF (12/291 Pages) Integrated Device Technology – SIX CHANNEL HD AUDIO CODECS

92HD66C
SIX CHANNEL HD AUDIO CODECS WITH DUAL CAPLESS HEADPHONE AMPLIFIERS
AFG
Power
State
D3
D3cold
D4
D5
Input Output
Enable Enable
1
0
1
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
0
0
-
-
-
-
-
-
Used as
output for
DAC/Mixer
NA
Used as
output for
analog
PC_Beep
NA
Used as
input for
ADC, mixer
Port Behavior
Yes Active - Port enabled as input
NA
NA
currently used by DAC, mixer,
beep, or is traditional line or
headphone output
not currently used by DAC,
mixer, beep, and is cap-less
headphone output
NA
NA
NA
NA
NA
NA
currently used by DAC, mixer,
beep, or is traditional line or
headphone output
not currently used by DAC,
mixer, beep, and is cap-less
headphone output
NA
NA
No
Inactive (Power Down) - Port keeps output
coupling caps charged if port uses caps.
NA
Active - Port enabled as output
NA
Inactive (Power Down)
Don’t care
Don’t care
Don’t care
Inactive (Power Down) - Port keeps output
coupling caps charged if port uses caps.
Not allowed. Port is active as Input.
Inactive (Power Down) - Port keeps output
coupling caps charged if port uses caps.
Low power state. If enabled, Beep will output
from the port
Don’t care Inactive (Power Down)
Don’t care
Inactive (Power Down) - Port keeps output
coupling caps charged if port uses caps.
Inactive (Power Down) - Port keeps output
coupling caps charged if port uses caps.
Inactive (Power Down) - Port keeps output
coupling caps charged if port uses caps.
Off - Charge on coupling caps (if used) will
not be maintained.
Table 2. Analog Output Port Behavior
2.3. Vref_Out
Ports A, B, C, & E (48-pin package only) support Vref_Out pins for biasing electret cartridge micro-
phones. Settings of 80% AVDD, 50% AVDD, GND, and Hi-Z are supported. Attempting to program a
pin widget control with a reserved or unsupported value will cause the associated Vref_Out pin to
assume a Hi-Z state and the pin widget control Vref_En field will return a value of ‘000’ (Hi-Z) when
read.
2.4. Jack Detect
Plugs inserted to a jack are detected using SENSE inputs as described in the tables below. Per
ECR15-B, the detection circuit operates when the CODEC is in D0 - D3 and can also operate if both
the CODEC and Controller are in D3 (no bus clock.) Jack detection requires that all supplies (analog
and digital) are active and stable. When AVDD is not present, the value reported in the pin widget is
invalid.
IDT CONFIDENTIAL
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92HD66C