ICS9FG107 Datasheet, PDF (11/18 Pages) Integrated Circuit Systems – Programmable FTG for Differential CPU, PCI Express & SATA Clocks

ICS9FG107
Programmable FTG for Differential P4^TM CPU, PCI-Express & SATA Clocks
Electrical Characteristics - DIF 0.7V Current Mode Differential Pair
T_A = 0 - 70°C; V_DD = 3.3 V +/-5%; C_L =2pF, R_S=33.2Ω, R_P=49.9Ω, Ι_REF = 475Ω
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Current Source Output
Impedance
Zo¹
V_O = V_x
3000
Ω
Voltage High
Voltage Low
VHigh
VLow
Statistical measurement on single ended
signal using oscilloscope math function.
660
-150
850
150
mV
Max Voltage
Min Voltage
Vovs
Vuds
Measurement on single ended signal using
absolute value.
-300
1150
mV
Crossing Voltage (abs)
Vcross(abs)
250
550
mV
Crossing Voltage (var)
d-Vcross
Variation of crossing over all edges
140
mV
Long Accuracy
ppm
see Tperiod min-max values
-300
300
ppm
400MHz nominal
2.4993
2.5008
ns
400MHz spread
2.4993
2.5133 ns
333.33MHz nominal
2.9991
3.0009
ns
333.33MHz spread
2.9991
3.016
ns
266.66MHz nominal
3.7489
3.7511
ns
266.66MHz spread
3.7489
3.77
ns
Average period
Tperiod
200MHz nominal
200MHz spread
4.9985
4.9985
5.0015
ns
5.0266 ns
166.66MHz nominal
5.9982
6.0018
ns
166.66MHz spread
5.9982
6.0320 ns
133.33MHz nominal
7.4978
7.5023
ns
133.33MHz spread
7.4978
5.4000 ns
100.00MHz nominal
9.9970
10.0030 ns
100.00MHz spread
9.9970
10.0533 ns
400MHz nominal/spread
2.4143
ns
333.33MHz nominal/spread
2.9141
ns
266.66MHz nominal/spread
3.6639
ns
Absolute min period
T_absmin
200MHz nominal/spread
4.8735
ns
166.66MHz nominal/spread
5.8732
ns
133.33MHz nominal/spread
7.3728
ns
100.00MHz nominal/spread
9.8720
ns
Rise Time
t_r
V_OL = 0.175V, V_OH = 0.525V
175
700
ps
Fall Time
t_f
V_OH = 0.525V V_OL = 0.175V
175
700
ps
Rise Time Variation
d-t_r
125
ps
Fall Time Variation
d-t_f
125
ps
Duty Cycle
d_t3
Measurement from differential wavefrom
45
55
%
Jitter, Cycle to cycle
t_jcyc-cyc
Measurement from differential wavefrom
f not equal 266 MHz
Measurement from differential wavefrom
f = 266 MHz
50
ps
85
ps
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz or 25 MHz}
3 _{Figures are for down spread.}
NOTES
1
1
1
1
1
1
1
1,2
2
2,3
2
2,3
2
2,3
2
2,3
2
2,3
2
2,3
2
2,3
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1
1
1
1
1
1
1
IDT^TM/ICS^TM Programmable FTG for Differential P4^TM CPU, PCI-Express & SATA Clocks
11
ICS9FG107 REV F 08/21/07