ICS932S805C Datasheet, PDF (11/19 Pages) Integrated Device Technology – K8 Clock Chip for Serverworks HT2100 Servers

ICS932S805C
K8 Clock Chip for Serverworks HT2100 Servers
SMBus Table: CPU/SRC Spread Spectrum Control Register
Byte 18 Pin #
Name
Control Function
Bit 7
-
Reserved
Reserved
Bit 6
-
SSP14
Bit 5
-
SSP13
Bit 4
-
Bit 3
-
Bit 2
-
SSP12
SSP11
SSP10
Spread Spectrum Programming
bit(14:8)
Bit 1
-
SSP9
Bit 0
-
SSP8
Type
0
1
R
-
-
RW
RW These Spread Spectrum bits
RW in Byte 17 and 18 will
RW
program the spread
RW pecentage of CPU and SRC
RW
outputs.
RW
PWD
0
X
X
X
X
X
X
X
SMBus Table: SRC Spread Spectrum Control Register
Byte 18 Pin #
Name
Control Function
Bit 7
-
Reserved
Reserved
Bit 6
-
Reserved
Reserved
Bit 5
-
Reserved
Reserved
Bit 4
-
Reserved
Reserved
Bit 3
-
Reserved
Reserved
Bit 2
-
Reserved
Reserved
Bit 1
-
Reserved
Reserved
Bit 0
-
Reserved
Reserved
Type
0
R
-
R
-
R
-
R
-
R
-
R
-
R
-
R
-
1
PWD
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
SMBus Table: Programmable Output Divider Register
Byte 19 Pin #
Name
Control Function
Bit 7
-
CPUDiv3
Bit 6
-
Bit 5
-
CPUDiv2
CPUDiv1
CPU Divider Ratio Programming Bits
Bit 4
-
CPUDiv0
Bit 3
-
Reserved
Reserved
Bit 2
-
Reserved
Reserved
Bit 1
-
Reserved
Reserved
Bit 0
-
Reserved
Reserved
Type
RW
RW
RW
RW
R
R
R
R
0
1
See CPU Divider Ratios
Table
-
-
-
-
-
-
-
-
PWD
X
X
X
X
0
0
0
0
SMBus Table: Programmable Output Divider Register
Byte 20 Pin #
Name
Control Function
Type
Bit 7
-
33MHzDiv3
RW
Bit 6
-
33MHzDiv2
33MHz Divider Ratio Programming RW
Bit 5
-
33MHzDiv1
Bits
RW
Bit 4
-
33MHzDiv0
RW
Bit 3
-
SRC_Div3
RW
Bit 2
-
Bit 1
-
SRC_Div2
SRC_Div1
SRC_ Divider Ratio Programming Bits
RW
RW
Bit 0
-
SRC_Div0
RW
0
1
33MHz Divider Ratio Table
SRC Divider Ratio Table
PWD
X
X
X
X
X
X
X
X
SMBusTable: Reserved Regsiter
Byte 21 is reserved do not write this register!
IDT^® K8 Clock Chip for Serverworks HT2100 Servers
11
1131D – 05/04/10