ICS874001I-05 Datasheet, PDF (11/17 Pages) Integrated Device Technology – PCI EXPRESS™ JITTER ATTENUATOR

ICS874001I-05
PCI EXPRESS™ JITTER ATTENUATOR
SCHEMATIC EXAMPLE
Figure 5 shows an example of ICS874001I-05 application
schematic. In this example, the device is operated at V =
DD
3.3V. The decoupling capacitors should be located as close
as possible to the power pin. The input is driven by a 3.3V
LVPECL driver.
VDD = 3.3V
VDD
10 R2
VDDA
C1
C2
0.1u
10u
PLL_SEL
MR
F_SEL1
F_SEL0
U1
1
2
PLL_SEL
3 ^nc
4 ^nc
5
6
7
8
nc
MR
nc
F_SEL1
9
10
VDDA
F_SEL0
VDD
nc
20
19
VDDO ₁₈
Q ₁₇
nQ
nc
nc
GND
16
15
14
13
nCLK
CLK
OE
12
11
VDDO = 3.3V
VDDO
Q
nQ
nCLK
CLK
OE
GND
Zo = 50 Ohm
Q
Zo = 50 Ohm
nQ
+
R1
100
-
Zo = 50 Ohm
Zo = 50 Ohm
LVPECL Driv er
R6
R7
50
50
Zo = 50 Ohm
Q
Logic Control Input Examples
Set Logic
Set Logic
VDD
VDD
Input to '1'
Input to '0'
RU1
1K
To Logic
Input
pins
RD1
Not Install
RU2
Not Install
To Logic
Input
pins
RD2
1K
VDDO (U1:19)
VDD(U1:10)
R4
R8
50
50
+
C5
C6
C7
.1uf
10uf .1uf
C3
0.1uF
-
R5
Zo = 50 Ohm
50
nQ
Alternate
LVDS
Termination
FIGURE 5. ICS874001I-05 SCHEMATIC LAYOUT
IDT^™ / ICS^™ PCI EXPRESS JITTER ATTENUATOR
11
ICS874001AGI-05 REV. A APRIL 20, 2009