ICS874001I-05 Datasheet, PDF (1/17 Pages) Integrated Device Technology – PCI EXPRESS™ JITTER ATTENUATOR

PCI EXPRESS™ JITTER ATTENUATOR
ICS874001I-05
GENERAL DESCRIPTION
The ICS874001I-05 is a high performance Jitter
ICS
Attenuator designed for use in PCI Express™ sys-
HiPerClockS™ tems. In some PCI Express systems, such as those
found in desktop PCs, the PCI Express clocks are
generated from a low bandwidth, high phase noise
PLL frequency synthesizer. In these systems, a jitter
attenuator may be required to attenuate high frequency random
and deterministic jitter components from the PLL synthesizer
and from the system board. The ICS874001I-05 has a bandwidth
of 6MHz with <1dB peaking, easily meeting PCI Express Gen2
PLL requirements.
The ICS874001I-05 uses IDT’s 3^rd Generation FemtoClock^TM
PLL technology to achive the lowest possible phase noise.
The device is packaged in a small 20-pin TSSOP package,
making it ideal for use in space constrained applications such as
PCI Express add-in cards.
FEATURES
• One differential LVDS output pair
• One differential clock input
• CLK and nCLK supports the following input types:
LVPECL, LVDS, LVHSTL, SSTL, HCSL
• Output frequency range: 98MHz - 640MHz
• Input frequency range: 98MHz - 128MHz
• VCO range: 490MHz - 640MHz
• Cycle-to-cycle jitter: 50ps (maximum)
• 3.3V operating supply
• PCI Express (2.5Gb/s) and Gen 2 (5 Gb/s) jitter compliant
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) package
PIN ASSIGNMENT
PLL_SEL ₁
nc 2
nc 3
nc 4
MR 5
nc 6
F_SEL1 7
VDDA 8
F_SEL0 9
VDD 10
20 ^nc
19 VDDO
18 Q
17 ^nQ
16 nc
15 nc
14 GND
13 nCLK
12 CLK
11 ^OE
ICS874001I-05
20-Lead TSSOP
6.5mm x 4.4mm x 0.925mm package body
G Package
Top View
IDT^™ / ICS^™ PCI EXPRESS JITTER ATTENUATOR
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ICS874001AGI-05 REV. A APRIL 20, 2009