83052AGILFT Datasheet, PDF (11/17 Pages) Integrated Device Technology – 2 1 single-ended multiplexer

ICS83052I Data Sheet
POWER CONSIDERATIONS
2:1, SINGLE ENDED MULTIPLEXER
This section provides information on power dissipation and junction temperature for the ICS830521I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS830521I is the sum of the core power plus the analog power plus the power
dissipated in the load(s).
The following is the power dissipation for V = 3.3V + 5% = 3.465V, which gives worst case results.
DD
Core and LVDS Output Power Dissipation
• Power (core) = V * (I + I ) = 3.4565V * (40mA + 5mA) = 155.93mW
MAX
DD_MAX
DD DDo
• Output Impedance R Power Dissipation due to Loading 50Ω to V /2
OUT
DD
Output Current I = V
/ [2 * (50Ω + R )] = 3.465 / [2 * (50Ω + 15Ω)] = 26.7mA
OUT
DDO_MAX
OUT
• Power Dissipation on the R per LVCMOS output
OUT
Power (R ) = R * (I )² = 15Ω * (26.7mA)² = 10.7mW
OUT
OUT
OUT
Dynamic Power Dissipation at 250MHz
• Power (250MHz) = C * frequency * (V )² = 18pF * 250MHz * (3.465V)² = 54.0mW
PD
DD
Total Power Dissipation
• Total Power
= Power (core) + Power (R ) Total Power + Power (250MHz)
MAX
OUT
= 155.93mW + 10.7mW + 54.0mW
=220.6mW
ICS83052I REVISION B DECEMBER 8, 2011
11
©2011 Integrated Device Technology, Inc.