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ICS9UMS9633BW Datasheet, PDF (10/18 Pages) Integrated Device Technology – ULTRA MOBILE PC CLOCK FOR AUTOMOTIVE USE
ICS9UMS9633BW
ULTRA MOBILE PC CLOCK FOR AUTOMOTIVE USE
Datasheet
Byte
Bit(s)
7
6
5
4
3
2
1
0
0
Pin #
-
-
-
-
-
-
-
-
PLL & Divider Enable Register
Name
Description
PLL1 Enable
This bit controls whether the PLL driving the CPU
and SRC clocks is enabled or not.
PLL2 Enable
This bit controls whether the PLL driving the DOT
and clock is enabled or not.
PLL3 Enable
This bit controls whether the PLL driving the LCD
clock is enabled or not.
Reserved
This bit controls whether the CPU output divider is
CPU Divider Enable
enabled or not.
NOTE: This bit should be automatically set to ‘0’ if
bit 7 is set to ‘0’.
This bit controls whether the SRC output divider is
SRC Output Divider
enabled or not.
Enable
NOTE: This bit should be automatically set to ‘0’ if
bit 7 is set to ‘0’.
This bit controls whether the LCD output divider is
LCD Output Divider
enabled or not.
Enable
NOTE: This bit should be automatically set to ‘0’ if
bit 5 is set to ‘0’.
This bit controls whether the DOT output divider is
DOT Output Divider
enabled or not.
Enable
NOTE: This bit should be automatically set to ‘0’ if
bit 6 is set to ‘0’.
Type
RW
RW
RW
RW
RW
RW
RW
0
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
1
Default
1 = Enabled
1
1 = Enabled
1
1 = Enabled
1
0
1 = Enabled
1
1 = Enabled
1
1 = Enabled
1
1 = Enabled
1
Byte
Bit(s)
7
6
5
4
3
2
1
0
1
Pin #
PLL SS Enable/Control Register
Name
Description
This bit controls whether PLL1 has spread enabled
PLL1 SS Enable or not. Spread spectrum for PLL1 is set at -0.5%
down-spread. Note that PLL1 drives the CPU and
SRC clocks.
Type
RW
This bit controls whether PLL3 has spread enabled
PLL3 SS Enable or not. Note that PLL3 drives the SSC clock, and RW
that the spread spectrum amount is set in bits 3-5.
These 3 bits select the frequency of PLL3 and the
PLL3 FS Select
SSC clock when Byte 1 Bit 6 (PLL3 Spread
RW
Spectrum Enable) is set.
Reserved
Reserved
Reserved
0
1
Default
0 = Disabled 1 = Enabled
1
0 = Disabled 1 = Enabled
1
See Table 2: LCD Spread
0
Select Table
0
0
0
0
0
IDTTM/ICSTM Ultra Mobile PC Clock for Automotive use
10
1425A—09/02/09