9ZXL1530_15 Datasheet, PDF (10/19 Pages) Integrated Device Technology – 15-OUTPUT DB1900Z LOW-POWER DERIVATIVE

9ZXL1530
15-OUTPUT DB1900Z LOW-POWER DERIVATIVE
Test Loads
Differential Output Terminations
DIF Zo (Ω)
Rs (Ω)
100
33
85
27
9ZXL Differential Test Loads
Rs
Rs
LP-HCSL
Differential
Output
Differential Zo,
10 inches
2pF
2pF
Clock Periods–Differential Outputs with Spread Spectrum Disabled
SSC OFF
DIF
Center
Freq.
MHz
1 00.00
1 33.33
1 Clock
-c2c jitter
AbsPer
Min
9 .9490 0
7 .4492 5
1us
-SSC
Short-Term
Av erage
Min
Measurement Window
0.1 s
0.1s
0.1s
- ppm
Long-Term
Average
Mi n
0 ppm
Pe riod
Nomina l
+ ppm
Long-Term
Avera ge
Max
9.99900 10.00000
1 0.001 00
7.499 25
7 .5000 0
7.500 75
1us
+SSC
S hort-Te rm
Aver age
Max
1 Clock
+c2c jitter
Abs Per
Max
10.05 100
7.55 075
Units Notes
ns 1,2,3
ns 1,2,4
Clock Periods–Differential Outputs with Spread Spectrum Enabled
Measurement Window
SSC ON
DIF
Center
Freq.
MHz
9 9.75
1 33.00
1 Clock
-c2c jitter
AbsPer
Min
9 .9490 6
7 .4493 0
1us
0.1 s
-SSC
- ppm
Short-Term Long-Term
Average Average
Min
9. 99906
7. 49930
Mi n
10.02 406
7.518 05
0.1s
0 ppm
Pe riod
Nomina l
10 .0250 6
7 .5188 0
0.1s
+ ppm
Long-Term
Avera ge
Max
1 0.026 07
7.519 55
1us
+SSC
S hort-Te rm
Aver age
Max
1 0.051 07
7.538 30
1 Clock
+c2c jitter
Abs Per
Max
10.10 107
7.58 830
Units Notes
ns 1,2,3
ns 1,2,4
Notes:
1 _{Guaranteed by design and characterization, not 100% tested in production.}
2 _{All Long Term Accuracy specifications are guaranteed with the assumption that the input clock complies with CK420BQ/CK410B+ accuracy}
requirements (+/-100ppm). The 9ZXL1530 itself does not contribute to ppm error.
3 _{Driven by SRC output of main clock, 100 MHz PLL Mode or Bypass mode}
4 _{Driven by CPU output of main clock, 133 MHz PLL Mode or Bypass mode}
IDT® 15-OUTPUT DB1900Z LOW-POWER DERIVATIVE
10
9ZXL1530
REV D 112015