90E21 Datasheet, PDF (10/57 Pages) Integrated Device Technology – Single-Phase High-Performance Wide-Span Energy Metering IC

90E21/22/23/24
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
2
PIN DESCRIPTION
Table-2 Pin Description
Name
Pin No.
I/O ^{note 1}
Reset
4
I
DVDD
DGND
AVDD
Vref
AGND
I1P
I1N
3
I
2
I
5
I
13
O
6, 14
I
10
11
I
I2P
I2N
VP
VN
NC
CS
SCLK
SDO
SDI
7
8
I
16
15
I
9, 12
24
I
25
I
26
OZ
27
I
MMD1
MMD0
1
28
I
Type
LVTTL
Power
Power
Power
Analog
Power
Analog
Analog
Analog
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
Description
Reset: Reset Pin (active low)
This pin should connect to ground through a 0.1µF filter capacitor. In application it can also
directly connect to one output pin from microcontroller (MCU).
DVDD: Digital Power Supply
This pin provides power supply to the digital part. It should be decoupled with a 10µF electro-
lytic capacitor and a 0.1µF capacitor.
DGND: Digital Ground
AVDD: Analog Power Supply
This pin provides power supply to the analog part. This pin should connect to DVDD through
a 10Ω resistor and be decoupled with a 0.1µF capacitor.
Vref: Output Pin for Reference Voltage
This pin should be decoupled with a 1µF capacitor and a 1nF capacitor.
AGND: Analog Ground
I1P: Positive Input for L Line Current
I1N: Negative Input for L Line Current
These pins are differential inputs for L line current. Input range is 5µVrms~25mVrms when
gain is '24'.
I2P: Positive Input for N Line Current
I2N: Negative Input for N Line Current
These pins are differential inputs for N line current. Input range is 120µVrms~600mVrms
when gain is '1'.
Note: I2P and I2N are dedicated for the 90E23/24. They should be left open for the 90E21/
22.
VP: Positive Input for Voltage
VN: Negative Input for Voltage
These pins are differential inputs for voltage. Input range is 120µVrms~600mVrms.
NC: This pin should be left open.
CS: Chip Select (Active Low)
In 4-wire SPI mode, this pin must be driven from high to low for each read/write operation,
and maintain low for the entire operation. In 3-wire SPI mode, this pin must be low all the
time. Refer to section 4.1.
SCLK: Serial Clock
This pin is used as the clock for the SPI interface. Data on SDI is shifted into the chip on the
rising edge of SCLK while data on SDO is shifted out of the chip on the falling edge of SCLK.
SDO: Serial Data Output
This pin is used as the data output for the SPI interface. Data on this pin is shifted out of the
chip on the falling edge of SCLK.
SDI: Serial Data Input
This pin is used as the data input for the SPI interface. Address and data on this pin is shifted
into the chip on the rising edge of SCLK.
MMD1/0: Metering Mode Configuration
00: anti-tampering mode (larger power);
01: L line mode (fixed L line);
10: L+N mode (applicable for single-phase three-wire system);
11: flexible mode (line specified by the LNSel bit (MMode, 2BH))
Note: The MMD1/0 pins are dedicated for the 90E23/24. For the 90E21/22, the metering
mode is fixed as L line mode, and MMD1 should connect to DGND and MMD0 should con-
nect to DVDD.
Pin Description
10
January 10, 2012