ICS87002-05 Datasheet, PDF (1/12 Pages) Integrated Device Technology – Third generation FemtoClock

1:2 LVCMOS/LVTTL-to-LVCMOS/LVTTL
Zero Delay Buffer for Audio
ICS87002-05
General Description
ICS
HiPerClockS™
The ICS87002-05 is a 1:2 LVCMOS/LVTTL low phase
noise Zero Delay Buffer and is optimized for audio
frequencies.
The device uses third generation FemtoClock®
Technology for an optimum of high frequency and
excellent phase jitter performance, combined with a low power
consumption.
The device utilizes an internal feedback loop therefore eliminating
the complexity of an external feedback loop.
The device utilizes a 3.3V supply and is packaged in a small,
lead-free (RoHS 6) 8-lead SOIC package.
DATA SHEET
Features
• Third generation FemtoClock® technology
• Low phase noise zero delay buffer
• Low skew outputs
• One LVCMOS/LVTTL clock input
• Two LVCMOS/LVTTL outputs
• Phase noise: -125dBc/Hz @1kHz offset; -130dBc/Hz @100kHz
offset
• Cycle-to-cycle jitter: 60ps (maximum)
• 0°C to 70°C ambient operating temperature
• Full 3.3V supply voltage
Supported Input Reference Clock Frequencies
REF_CLK Frequencies
11.2896MHz
12.288MHz
16.384MHz
16.9344MHz
18.432MHz
22.5792MHz
24.576MHz
Block Diagram
REF_CLK
PFD
&
LPF
VCO
Internal feedback
Pin Assignment
REF_CLK 1
8 nc
VDD 2
7 Q1
Q1
GND 3
6 VDD
Q2 4
5 GND
Q2
ICS87002-05
8-lead SOIC
3.8mm x 4.8mm x 1.47mm
M Package
Top View
ICS87002BM-05 REVISION B APRIL 16, 2010
1
©2010 Integrated Device Technology, Inc.