ICS8543BGILF Datasheet, PDF (1/18 Pages) Integrated Device Technology – Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

Low Skew, 1-to-4,
Differential-to-LVDS Fanout Buffer
ICS8543
General Description
The ICS8543 is a low skew, high performance 1-to-4
Differential-to-LVDS Clock Fanout Buffer. Utilizing Low Voltage
Differential Signaling (LVDS) the ICS8543 provides a low power, low
noise, solution for distributing clock signals over controlled
impedances of 100Ω. The ICS8543 has two selectable clock inputs.
The CLK, nCLK pair can accept most standard differential input
levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL
input levels. The clock enable is internally synchronized to eliminate
runt pulses on the outputs during asynchronous
assertion/deassertion of the clock enable pin.
Guaranteed output and part-to-part skew characteristics make the
ICS8543 ideal for those applications demanding well defined
performance and repeatability.
DATA SHEET
Features
• Four differential LVDS output pairs
• Selectable differential CLK, nCLK or LVPECL clock inputs
• CLK, nCLK pair can accept the following differential input levels:
LVPECL, LVDS, LVHSTL, SSTL, HCSL
• PCLK, nPCLK pair can accept the following differential input
levels: LVPECL, CML, SSTL
• Maximum output frequency: 800MHz
• Translates any single-ended input signals to LVDS levels with
resistor bias on nCLK input
• Additive phase jitter, RMS: 0.164ps (typical)
• Output skew: 40ps (maximum)
• Part-to-part skew: 500ps (maximum)
• Propagation delay: 2.6ns (maximum)
• Full 3.3V supply mode
• 0°C to 70°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
Block Diagram
CLK_EN ^Pullup
CLK ^Pulldown
nCLK ^Pullup
0₀
PCLK ^Pulldown
1
nPCLK ^Pullup
1
CLK_SEL ^Pulldown
D
Q
LE
OE ^Pullup
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Pin Assignment
GND 1
CLK_EN 2
CLK_SEL 3
CLK 4
nCLK 5
PCLK 6
nPCLK 7
OE 8
GND 9
VDD 10
20 Q0
19 nQ0
18 VDD
17 Q1
16 nQ1
15 Q2
14 nQ2
13 GND
12 Q3
11 nQ3
ICS8543
20-Lead TSSOP
6.5mm x 4.4mm x 0.925mm
package body
G Package
Top View
ICS8543BG REVISION E DECEMBER 17, 2010
1
©2010 Integrated Device Technology, Inc.