ICS85411I Datasheet, PDF (1/16 Pages) Integrated Device Technology – LOW SKEW, 1-TO-2 DIFFERENTIAL-TOLVDS FANOUT BUFFER

LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-
LVDS FANOUT BUFFER
GENERAL DESCRIPTION
The ICS85411I is a low skew, high performance
ICS
1-to-2 Differential-to-LVDS Fanout Buffer and a
HiPerClockS™ _{member of the HiPerClockS™ family of High}
Performance Clock Solutions from IDT. The CLK,
nCLK pair can accept most standard differential in-
put levels.The ICS85411I is characterized to operate from
a 3.3V power supply. Guaranteed output and par t-to-par t
skew characteristics make the ICS85411I ideal for those
clock distribution applications demanding well defined per-
for mance and repeatability.
ICS85411I
FEATURES
• Two differential LVDS outputs
• One differential CLK, nCLK clock input
• CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
• Maximum output frequency: 650MHz
• Translates any single ended input signal to
LVDS levels with resistor bias on nCLK input
• Output skew: 25ps (maximum)
• Part-to-part skew: 300ps (maximum)
• Additive phase jitter, RMS: 0.05ps (typical)
• Propagation delay: 2.5ns (maximum)
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead free (RoHS 6)
packages
BLOCK DIAGRAM
Q0
CLK
nQ0
nCLK
Q1
nQ1
PIN ASSIGNMENT
Q0 1
nQ0 2
Q1 3
nQ1 4
8 VDD
7 CLK
6 nCLK
5 GND
ICS85411I
8-Lead SOIC
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
IDT^™ / ICS^™ DIFFERENTIAL-TO-LVDS FANOUT BUFFER
1
ICS85411AMI REV. B NOVEMBER 7, 2007