9EX21501A Datasheet, PDF (1/15 Pages) Integrated Device Technology – 15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux

DATASHEET
15 Output PCIe G2/QPI Differential Buffer with
2:1 Input Mux
9EX21501A
Description
The ICS9EX21501 provides 15 output clocks for PCIe Gen2
(100MHz) or QPI (133MHz) applications. A differential CPU clock
from a CK410B+ main clock generator, such as the ICS932S421,
drives the ICS9EX21501. In fanout mode, the ICS9EX21501
provides outputs up to 400MHz. A 2:1 input mux allows selection
between local and remote clock sources.
Recommended Application:
15 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
Key Specifications:
• DIF output cycle-to-cycle jitter < 50ps
• DIF output-to-output skew < 150 ps
• PCIe Gen2 compliant phase jitter
• QPI 6.4Gb/s 12UI compliant phase jitter
Features/Benefits:
• Output clock frequencies up to 400 MHz/supports wide
range of applications
• 4 Selectable SMBus addresses/multiple devices can share
SMBus segment
• SMBus address independent of PLL operating mode/
maximum flexibility
• Dedicated CKPWRGD/PD# and VDDA pins/Easy board
design
• 8 Dedicated OE# and 2 Group OE# pins/Support for
hardware clock management
Output Features:
• 15 - 0.7V current-mode differential HCSL output pairs
• Supports zero delay buffer mode and fanout mode
• Selectable PLL bandwidth
• 80-150 MHz in PLL Mode
• 33-400 MHz operation in Bypass mode
Functional Block Diagram
OE13_14# ₁₀
OE(5:12)#,
OE_01234#
CLKA_IN
CLKA_IN#
CLKB_IN
CLKB_IN#
HIBW_BYPM_LOBW#
100M_133M#
CKPWRGD/PD#
SMB_A0
SMB_A1
SEL_A_B#
SMBDAT
SMBCLK
Logic
PLL
(SS Compatible)
IDT^® 15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux
1
15
DIF(14:0)
IREF
1578—07/18/11