ICS932S825 Datasheet, PDF (9/20 Pages) Integrated Circuit Systems – Low Power Clock Chip for Serverworks HT2400 Servers

ICS932S825
AC Electrical Characteristics - Low Power Differential CPU Outputs
T_A = 0 - 70°C; V_DD = 3.3 V +/-5%; C_L =AMD64 Processor Test Load
PARAMETER
SYMBOL
CONDITIONS
Crossing Point Variation ∆V_CROSS
Single-ended Measurement
Frequency
f
Long Term Accuracy
ppm
MIN
TYP
198.8
-300
MAX
140
200
300
UNITS
mV
MHz
ppm
NOTES
1
2
3
Rising Edge Slew Rate
t_SLR
Differential Measurement
0.5
10
V/ns
4,5
Falling Edge Slew Rate
t_FLR
Differential Measurement
0.5
CPU Jitter - Cycle to
Cycle
CPUJ_C2C
Differential Measurement
10
V/ns
4,5
150
ps
6
CPU Jitter - Accumulated
Maximum Output Voltage
Minimum Output Voltage
CPUJ_ACC
V_HIGH
V_LOW
Over a 10 uS period
Includes overshoot, single-ended
measurement
Includes undershoot, single-ended
measurement
-1
-300
1
ns
7
1150 mV
1
mV
1
Differential Voltage Swing
Peak-to-Peak
V_DPK-PK
Differential Measurement
400
2400 mV
8
Differential Voltage
V_D
Change in V_D DC cycle-to-
cycle
∆V_D
Differential Measurement
200
Single-ended Measurement
-75
1200 mV
9
75
mV
10
Duty Cycle
D_CYC
Differential Measurement
45
55
%
11
CPU[6:0] Skew
CPU_SKEW10
Differential Measurement
250
ps
Notes on Electrical Characteristics (Guaranteed by design and characterization, not 100% tested in production):
1_{Single-ended measurement at crossing point. Value is max-min over all time. DC value of common mode is not important due to}
the blocking cap.
2 _{Minimum frequency results from 0.5% down spread.}
3 _{Measured with spread spectrum off.}
4 _{This parameter is intended to give guidance for simulation.}
5 _{Differential measurement through the range of +/-100mV}
6 _{Between any two adjacent cycles.}
7 _{Accumulated over a 10 uS time periode, measured with JIT2 TIE at 50ps interval.}
8 _{VDPK-PK is the overall magnitude of the differential signal.}
9 _{VDMIN is the amplitude of the ring-back differential measurement, guaranteed by design, that ring-back will not cross 0V}
V_D. V_DMAX is the largest amplitude allowed.
10 _{The difference in magnitude of two adjacent VDDC measurements. VDDC is the stable post overshoot and ring-back part}
11 _{Defined as tHIGH/tCYCLE}
1276D—10/25/07
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